[Bug 236513] Different power states (C1/C2/...) per CPU core
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bugzilla-noreply at freebsd.org
Wed Mar 13 18:58:51 UTC 2019
https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=236513
Bug ID: 236513
Summary: Different power states (C1/C2/...) per CPU core
Product: Base System
Version: 11.2-STABLE
Hardware: amd64
OS: Any
Status: New
Severity: Affects Only Me
Priority: ---
Component: kern
Assignee: bugs at FreeBSD.org
Reporter: stockhausen at collogia.de
Created attachment 202845
--> https://bugs.freebsd.org/bugzilla/attachment.cgi?id=202845&action=edit
dmesg
Hi,
we are running FreeBSD 11.2-RELEASE-p6 on a HP T620 Thin client. Trying to
enable power saving through C states we noticed that the system presents
different states for the cores:
sysctl -a | grep cx_supported
dev.cpu.3.cx_supported: C1/1/0
dev.cpu.2.cx_supported: C1/1/0
dev.cpu.1.cx_supported: C1/1/0
dev.cpu.0.cx_supported: C1/1/0 C2/2/400
Enabling C2 state on CPU shows that it seems to work quite well:
sysctl -a | grep cx_usage:
dev.cpu.3.cx_usage: 100.00% last 34923us
dev.cpu.2.cx_usage: 100.00% last 10us
dev.cpu.1.cx_usage: 100.00% last 3853us
dev.cpu.0.cx_usage: 5.54% 94.45% last 33us
CPU details:
CPU: AMD GX-420CA SOC with Radeon(tm) HD Graphics (1996.29-MHz K8-class CPU)
Origin="AuthenticAMD" Id=0x700f01 Family=0x16 Model=0x0 Stepping=1
Features=0x178bfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,MMX,FXSR,SSE,SSE2,HTT>
Features2=0x3ed8220b<SSE3,PCLMULQDQ,MON,SSSE3,CX16,SSE4.1,SSE4.2,MOVBE,POPCNT,AESNI,XSAVE,OSXSAVE,AVX,F16C>
AMD Features=0x2e500800<SYSCALL,NX,MMX+,FFXSR,Page1GB,RDTSCP,LM>
AMD
Features2=0x154037ff<LAHF,CMP,SVM,ExtAPIC,CR8,ABM,SSE4A,MAS,Prefetch,OSVW,IBS,SKINIT,WDT,Topology,PNXC,DBE,PL2I>
Structured Extended Features=0x8<BMI1>
XSAVE Features=0x1<XSAVEOPT>
SVM: (disabled in BIOS) NP,NRIP,AFlush,DAssist,NAsids=8
TSC: P-state invariant, performance statistics
Is this the expected behaviour?
dmesg log attached.
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