[Bug 204376] Cavium ThunderX system heavily loaded while at db> prompt

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https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=204376

--- Comment #2 from Conrad E. Meyer <cem at freebsd.org> ---
If ARM is anything like amd64, it just spinwaits in IPI_STOP (waiting for the
CPU
to be re-enabled).  On amd64 you could reduce it to 2 CPUs spinning pretty
easily
(hlt any non-panic and non-BSP core -- they'll never be needed until reboot).
But that still leaves 2 CPUs spinning.

The patch attempted to hlt all non-panic CPUs in IPI_STOP, but leave interrupts
enabled so they could be woken again.  This does Not Work Well in panic context
(I forget the details, but if you've paniced you really don't want normal
interrupt
code running on the non-ddb CPU(s)).

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