kern/139743: [ichsmb] [patch] ichsmb driver doesn't detects SMB bus on Asus P4B533/P4PE motherboards

Takefu takefu at airport.fm
Fri Feb 28 04:21:07 UTC 2014


>From whom isn't there reaction in this PR?
This is a patch corresponding to 10.0-RELEASE.


-------------- next part --------------
--- sys/dev/pci/pci.c.orig	2014-02-24 12:40:07.000000000 +0900
+++ sys/dev/pci/pci.c	2014-02-24 12:48:55.000000000 +0900
@@ -112,6 +112,7 @@
 			    uint16_t data);
 static void		pci_enable_msix(device_t dev, u_int index,
 			    uint64_t address, uint32_t data);
+static void		pci_fix_asus_smbus(device_t dev);
 static void		pci_mask_msix(device_t dev, u_int index);
 static void		pci_unmask_msix(device_t dev, u_int index);
 static int		pci_msi_blacklisted(void);
@@ -196,54 +197,56 @@
 #define	PCI_QUIRK_ENABLE_MSI_VM	3 /* Older chipset in VM where MSI works */
 #define	PCI_QUIRK_UNMAP_REG	4 /* Ignore PCI map register */
 #define	PCI_QUIRK_DISABLE_MSIX	5 /* MSI-X doesn't work */
+#define	PCI_QUIRK_FIXUP_ROUTINE	6 /* PCI needs a fix to continue */
 	int	arg1;
 	int	arg2;
+	void (*fixup_func)(device_t dev);
 };
 
 static const struct pci_quirk pci_quirks[] = {
 	/* The Intel 82371AB and 82443MX have a map register at offset 0x90. */
-	{ 0x71138086, PCI_QUIRK_MAP_REG,	0x90,	 0 },
-	{ 0x719b8086, PCI_QUIRK_MAP_REG,	0x90,	 0 },
+	{ 0x71138086, PCI_QUIRK_MAP_REG,	0x90,	 0, NULL },
+	{ 0x719b8086, PCI_QUIRK_MAP_REG,	0x90,	 0, NULL },
 	/* As does the Serverworks OSB4 (the SMBus mapping register) */
-	{ 0x02001166, PCI_QUIRK_MAP_REG,	0x90,	 0 },
+	{ 0x02001166, PCI_QUIRK_MAP_REG,	0x90,	 0, NULL },
 
 	/*
 	 * MSI doesn't work with the ServerWorks CNB20-HE Host Bridge
 	 * or the CMIC-SL (AKA ServerWorks GC_LE).
 	 */
-	{ 0x00141166, PCI_QUIRK_DISABLE_MSI,	0,	0 },
-	{ 0x00171166, PCI_QUIRK_DISABLE_MSI,	0,	0 },
+	{ 0x00141166, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
+	{ 0x00171166, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
 
 	/*
 	 * MSI doesn't work on earlier Intel chipsets including
 	 * E7500, E7501, E7505, 845, 865, 875/E7210, and 855.
 	 */
-	{ 0x25408086, PCI_QUIRK_DISABLE_MSI,	0,	0 },
-	{ 0x254c8086, PCI_QUIRK_DISABLE_MSI,	0,	0 },
-	{ 0x25508086, PCI_QUIRK_DISABLE_MSI,	0,	0 },
-	{ 0x25608086, PCI_QUIRK_DISABLE_MSI,	0,	0 },
-	{ 0x25708086, PCI_QUIRK_DISABLE_MSI,	0,	0 },
-	{ 0x25788086, PCI_QUIRK_DISABLE_MSI,	0,	0 },
-	{ 0x35808086, PCI_QUIRK_DISABLE_MSI,	0,	0 },
+	{ 0x25408086, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
+	{ 0x254c8086, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
+	{ 0x25508086, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
+	{ 0x25608086, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
+	{ 0x25708086, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
+	{ 0x25788086, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
+	{ 0x35808086, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
 
 	/*
 	 * MSI doesn't work with devices behind the AMD 8131 HT-PCIX
 	 * bridge.
 	 */
-	{ 0x74501022, PCI_QUIRK_DISABLE_MSI,	0,	0 },
+	{ 0x74501022, PCI_QUIRK_DISABLE_MSI,	0,	0, NULL },
 
 	/*
 	 * MSI-X allocation doesn't work properly for devices passed through
 	 * by VMware up to at least ESXi 5.1.
 	 */
-	{ 0x079015ad, PCI_QUIRK_DISABLE_MSIX,	0,	0 }, /* PCI/PCI-X */
-	{ 0x07a015ad, PCI_QUIRK_DISABLE_MSIX,	0,	0 }, /* PCIe */
+	{ 0x079015ad, PCI_QUIRK_DISABLE_MSIX,	0,	0, NULL }, /* PCI/PCI-X */
+	{ 0x07a015ad, PCI_QUIRK_DISABLE_MSIX,	0,	0, NULL }, /* PCIe */
 
 	/*
 	 * Some virtualization environments emulate an older chipset
 	 * but support MSI just fine.  QEMU uses the Intel 82440.
 	 */
-	{ 0x12378086, PCI_QUIRK_ENABLE_MSI_VM,	0,	0 },
+	{ 0x12378086, PCI_QUIRK_ENABLE_MSI_VM,	0,	0, NULL },
 
 	/*
 	 * HPET MMIO base address may appear in Bar1 for AMD SB600 SMBus
@@ -253,7 +256,11 @@
 	 * For SB600 A21 and later, firmware must set the bit to hide it.
 	 * For SB700 and later, it is unused and hardcoded to zero.
 	 */
-	{ 0x43851002, PCI_QUIRK_UNMAP_REG,	0x14,	0 },
+	{ 0x43851002, PCI_QUIRK_UNMAP_REG,	0x14,	0, NULL },
+
+	/* The ASUS P4B-motherboards needs a hack to enable the Intel 801SMBus */
+	{ 0x24408086, PCI_QUIRK_FIXUP_ROUTINE,	0,	0, &pci_fix_asus_smbus },
+	{ 0x24C08086, PCI_QUIRK_FIXUP_ROUTINE,	0,	0, &pci_fix_asus_smbus },
 
 	{ 0 }
 };
@@ -527,6 +534,27 @@
 		cfg->hdrtype = PCIM_HDRTYPE_BRIDGE;
 }
 
+/* asus p4b/p4pe hack */
+
+static void
+pci_fix_asus_smbus(device_t dev)
+{
+	int	pmccfg;
+
+	/* read subsystem vendor-id */
+	pmccfg = pci_read_config(dev, 0xF2, 2);
+	printf(" [-] pmccfg: %.4x\n",pmccfg);
+	if( pmccfg & 0x8 ){
+		pmccfg &= ~0x8;
+		pci_write_config(dev, 0xF2, pmccfg, 2);
+		pmccfg = pci_read_config(dev, 0xF2, 2);
+		if( pmccfg & 0x8 )
+			printf("Could not enable Intel 801SMBus!\n");
+		else
+			printf("Enabled Intel 801SMBus\n");
+	}
+}
+
 /* extract header type specific config data */
 
 static void
@@ -3206,6 +3234,12 @@
 			 * Skip quirked resources.
 			 */
 			for (q = &pci_quirks[0]; q->devid != 0; q++)
+				if (q->devid == ((cfg->device << 16) | cfg->vendor) ){
+				    if( q->type == PCI_QUIRK_MAP_REG )
+					pci_add_map(bus, dev, q->arg1, rl, force, 0);
+				    else if( q->type == PCI_QUIRK_FIXUP_ROUTINE )
+					q->fixup_func(dev);
+				}
 				if (q->devid == devid &&
 				    q->type == PCI_QUIRK_UNMAP_REG &&
 				    q->arg1 == PCIR_BAR(i))


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