kern/127859: Update AMD features in identcpu.c
Artem Naluzhnyy
tut at nhamon.com.ua
Sat Oct 4 17:50:02 UTC 2008
>Number: 127859
>Category: kern
>Synopsis: Update AMD features in identcpu.c
>Confidential: no
>Severity: non-critical
>Priority: low
>Responsible: freebsd-bugs
>State: open
>Quarter:
>Keywords:
>Date-Required:
>Class: change-request
>Submitter-Id: current-users
>Arrival-Date: Sat Oct 04 17:50:01 UTC 2008
>Closed-Date:
>Last-Modified:
>Originator: Artem Naluzhnyy
>Release:
>Organization:
>Environment:
>Description:
Here is a patch to satisfy recent CPUID Specification from AMD (http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25481.pdf). It should be applied to sys/i386/i386/identcpu.c and sys/amd64/amd64/identcpu.c probably.
>How-To-Repeat:
>Fix:
--- identcpu.c.orig 2008-10-04 19:56:38.000000000 +0300
+++ identcpu.c 2008-10-04 20:21:26.000000000 +0300
@@ -754,6 +754,9 @@
}
/*
+ * AMD CPUID Specification, Revision 2.28
+ * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25481.pdf
+ *
* AMD64 Architecture Programmer's Manual Volume 3:
* General-Purpose and System Instructions
* http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24594.pdf
@@ -775,7 +778,7 @@
"\010<s7>" /* Same */
"\011<s8>" /* Same */
"\012<s9>" /* Same */
- "\013<b10>" /* Undefined */
+ "\013<b10>" /* Reserved */
"\014SYSCALL" /* Have SYSCALL/SYSRET */
"\015<s12>" /* Same */
"\016<s13>" /* Same */
@@ -783,17 +786,17 @@
"\020<s15>" /* Same */
"\021<s16>" /* Same */
"\022<s17>" /* Same */
- "\023<b18>" /* Reserved, unknown */
- "\024MP" /* Multiprocessor Capable */
+ "\023<b18>" /* Reserved */
+ "\024<b19>" /* Reserved */
"\025NX" /* Has EFER.NXE, NX */
- "\026<b21>" /* Undefined */
+ "\026<b21>" /* Reserved */
"\027MMX+" /* AMD MMX Extensions */
"\030<s23>" /* Same */
"\031<s24>" /* Same */
"\032FFXSR" /* Fast FXSAVE/FXRSTOR */
"\033Page1GB" /* 1-GB large page support */
"\034RDTSCP" /* RDTSCP */
- "\035<b28>" /* Undefined */
+ "\035<b28>" /* Reserved */
"\036LM" /* 64 bit long mode */
"\0373DNow!+" /* AMD 3DNow! Extensions */
"\0403DNow!" /* AMD 3DNow! */
@@ -808,15 +811,18 @@
"\003SVM" /* Secure Virtual Mode */
"\004ExtAPIC" /* Extended APIC register */
"\005CR8" /* CR8 in legacy mode */
- "\006<b5>"
- "\007<b6>"
- "\010<b7>"
+ "\006ABM" /* Advanced Bit Manipulation */
+ "\007SSE4A" /*
+ * EXTRQ, INSERTQ, MOVNTSS,
+ * and MOVNTSD instructions
+ */
+ "\010MASSE" /* Misaligned SSE mode */
"\011Prefetch" /* 3DNow! Prefetch/PrefetchW */
- "\012<b9>"
- "\013<b10>"
- "\014<b11>"
- "\015<b12>"
- "\016<b13>"
+ "\012OSVW" /* OS Visible Workaround */
+ "\013IBS" /* Instruction Based Sampling */
+ "\014SSE5" /* SSE5 Instruction support */
+ "\015SKINIT" /* SKINIT/STGI support */
+ "\016WDT" /* Watchdog timer support */
"\017<b14>"
"\020<b15>"
"\021<b16>"
>Release-Note:
>Audit-Trail:
>Unformatted:
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