kern/124564: add CPUID bits to ident phenom processor

[pluknet]

>Number:         124564
>Category:       kern
>Synopsis:       add CPUID bits to ident phenom processor
>Confidential:   no
>Severity:       non-critical
>Priority:       low
>Responsible:    freebsd-bugs
>State:          open
>Quarter:        
>Keywords:       
>Date-Required:
>Class:          sw-bug
>Submitter-Id:   current-users
>Arrival-Date:   Fri Jun 13 22:10:01 UTC 2008
>Closed-Date:
>Last-Modified:
>Originator:     pluknet
>Release:        8.0-CURRENT
>Organization:
n/a
>Environment:
FreeBSD 8.0-CURRENT #6: Wed Apr 30 00:29:35 MSD 2008
>Description:
There are several new CPUIDs to recognize AMD Extended Features, ECX 07FFh for Phenom processor.
According to [1], they are:

Bit 0: LAHF/SAHF
Bit 1: CMP
Bit 2: SVM (Secure Virtual Mode)
Bit 3: APIC
Bit 4: MOV CR8
*Bit 5: Advanced Bit Manipulation (LZCNT)
*Bit 6: SSE4A (EXTRQ, INSERTQ, MOVNTSS, MOVNTSD)
*Bit 7: Misalign SSE
Bit 8: 3DNow! (PREFETCH и PREFTECHW)
*Bit 9: OS Visible Workaround
*Bit 10: Instruction Based Sampling

* - missing bits in amd64/identcpu.c
[1]http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116.pdf
>How-To-Repeat:
Look at "AMD Features2" in dmesg.
>Fix:
Apply the patch.

Patch attached with submission follows:

--- identcpu.c.orig	2008-06-14 01:45:28.000000000 +0400
+++ identcpu.c	2008-06-14 02:04:48.000000000 +0400
@@ -39,7 +39,7 @@
  */
 
 #include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/amd64/amd64/identcpu.c,v 1.159 2008/05/23 04:03:52 alc Exp $");
+__FBSDID("$FreeBSD$");
 
 #include "opt_cpu.h"
 
@@ -263,6 +263,9 @@
 			 * General-Purpose and System Instructions
 			 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24594.pdf
 			 *
+			 * BIOS and Kernel Developer's Guide (BKDG) For AMD Family 10h Processors
+			 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116.pdf
+			 *
 			 * IA-32 Intel Architecture Software Developer's Manual,
 			 * Volume 2A: Instruction Set Reference, A-M
 			 * ftp://download.intel.com/design/Pentium4/manuals/25366617.pdf
@@ -313,12 +316,12 @@
 				"\003SVM"	/* Secure Virtual Mode */
 				"\004ExtAPIC"	/* Extended APIC register */
 				"\005CR8"	/* CR8 in legacy mode */
-				"\006<b5>"
-				"\007<b6>"
-				"\010<b7>"
+				"\006ABM"	/* LZCNT Instruction */
+				"\007SSE4A"	/* SSE4A Instructions */
+				"\010MisAlign"	/* Misaligned SSE Mode */
 				"\011Prefetch"	/* 3DNow! Prefetch/PrefetchW */
-				"\012<b9>"
-				"\013<b10>"
+				"\012OSVW"	/* OS Visible Work-around */
+				"\013IBS"	/* Instruction Based Sampling */
 				"\014<b11>"
 				"\015<b12>"
 				"\016<b13>"


>Release-Note:
>Audit-Trail:
>Unformatted: