kern/118308: 6.2 on IBM Blade HS20, Nortel Switches, hw.bge.fake_autoneg

[Jung-uk Kim]

On Wednesday 28 November 2007 11:30 am, Helmut Schneider wrote:
> The following reply was made to PR kern/118308; it has been noted
> by GNATS.
>
> From: "Helmut Schneider" <jumper99 at gmx.de>
> To: "Helmut Schneider" <jumper99 at gmx.de>,
> 	<bug-followup at FreeBSD.org>
> Cc:
> Subject: Re: kern/118308: 6.2 on IBM Blade HS20, Nortel Switches,
> hw.bge.fake_autoneg Date: Wed, 28 Nov 2007 17:20:56 +0100
>
>  Sorry, old one I think is that DLink or so (where it works fine),
> new switch is the Nortel Networks Layer 2/3 GbE Switch Module...

This problem should be fixed already.  If you really have to use 
RELENG_6_2, you can try the attached patch.

Jung-uk Kim
-------------- next part --------------
--- sys/dev/bge/if_bge.c.orig	2007-11-28 11:55:47.000000000 -0500
+++ sys/dev/bge/if_bge.c	2007-11-28 11:58:10.000000000 -0500
@@ -397,9 +397,6 @@
 DRIVER_MODULE(bge, pci, bge_driver, bge_devclass, 0, 0);
 DRIVER_MODULE(miibus, bge, miibus_driver, miibus_devclass, 0, 0);
 
-static int bge_fake_autoneg = 0;
-TUNABLE_INT("hw.bge.fake_autoneg", &bge_fake_autoneg);
-
 static uint32_t
 bge_readmem_ind(struct bge_softc *sc, int off)
 {
@@ -3235,18 +3232,20 @@
 			 * mechanism for programming the autoneg
 			 * advertisement registers in TBI mode.
 			 */
-			if (bge_fake_autoneg == 0 &&
-			    sc->bge_asicrev == BGE_ASICREV_BCM5704) {
+			if (sc->bge_asicrev == BGE_ASICREV_BCM5704) {
 				uint32_t sgdig;
-				CSR_WRITE_4(sc, BGE_TX_TBI_AUTONEG, 0);
-				sgdig = CSR_READ_4(sc, BGE_SGDIG_CFG);
-				sgdig |= BGE_SGDIGCFG_AUTO|
-				    BGE_SGDIGCFG_PAUSE_CAP|
-				    BGE_SGDIGCFG_ASYM_PAUSE;
-				CSR_WRITE_4(sc, BGE_SGDIG_CFG,
-				    sgdig|BGE_SGDIGCFG_SEND);
-				DELAY(5);
-				CSR_WRITE_4(sc, BGE_SGDIG_CFG, sgdig);
+				sgdig = CSR_READ_4(sc, BGE_SGDIG_STS);
+				if (sgdig & BGE_SGDIGSTS_DONE) {
+					CSR_WRITE_4(sc, BGE_TX_TBI_AUTONEG, 0);
+					sgdig = CSR_READ_4(sc, BGE_SGDIG_CFG);
+					sgdig |= BGE_SGDIGCFG_AUTO |
+					    BGE_SGDIGCFG_PAUSE_CAP |
+					    BGE_SGDIGCFG_ASYM_PAUSE;
+					CSR_WRITE_4(sc, BGE_SGDIG_CFG,
+					    sgdig | BGE_SGDIGCFG_SEND);
+					DELAY(5);
+					CSR_WRITE_4(sc, BGE_SGDIG_CFG, sgdig);
+				}
 			}
 			break;
 		case IFM_1000_SX: