kern/98460 : [kernel] [patch] fpu_clean_state() cannot be disabled for not AMD processors, those are not vulnerable to FreeBSD-SA-06:14.fpu

[Rostislav Krasny]

The following reply was made to PR kern/98460; it has been noted by GNATS.

From: Rostislav Krasny <rosti.bsd at gmail.com>
To: Bruce Evans <bde at zeta.org.au>
Cc: freebsd-gnats-submit at freebsd.org
Subject: Re: kern/98460 : [kernel] [patch] fpu_clean_state() cannot be
 disabled for not AMD processors, those are not vulnerable to
 FreeBSD-SA-06:14.fpu
Date: Fri, 16 Jun 2006 20:38:47 +0300

 On Fri, 16 Jun 2006 22:50:01 +1000 (EST)
 Bruce Evans <bde at zeta.org.au> wrote:
 
 > Why are we worrying about just this and not all the other branches on
 > cpu_fxsr, not to mention all other branches in the kernel :-)?
 
 I think it is a matter of principle. AMD saved few microcomands in
 their incorrect implementation of two Pentium III instructions. And now
 buyers if their processors are paying much more than those few
 microcomands. Why should buyers of processors from other manufacturers,
 which implemented FXSAVE and FXRSTOR correctly, pay even a tiny bit of
 their performance for nothing?
 
 There is an assembly workaround, provided by AMD. Adding to it 10 more
 assembly instructions shouldn't be a hard work. It could looks like
 this:
 
 		.byte	0xEB;		\n\	/* short JMP */
 	l0:	.byte	0x00;		\n\	/* where to jump */
 	l1:	bt	$1,%%ax;	\n\	/* CPU_FXSR_NEEDCLEAN bit */
 		jc	l2;		\n\
 		movl	$l5,%%eax;	\n\
 		subl	$l1,%%eax;	\n\
 		movb	%%al,l0;	\n\
 		jmp	l5;		\n\
 	l2:	movl	$l3,%%eax;	\n\
 		subl	$l1,%%eax;	\n\
 		movb	%%al,l0;	\n\
 	l3:	fnstsw	%%ax;		\n\
 		ffree	%%st(7);	\n\
 		bt	$7,%%ax;	\n\
 		jnc	l4;		\n\
 		fnclex;			\n\
 	l4:	fildl	safe_address;	\n\
 	l5:				\n\