Index: sys/boot/fdt/dts/arm/zedboard.dts
===================================================================
--- sys/boot/fdt/dts/arm/zedboard.dts	(revision 298364)
+++ sys/boot/fdt/dts/arm/zedboard.dts	(working copy)
@@ -71,7 +71,7 @@
 			compatible = "arm,gic";
 			interrupt-controller;
 			#address-cells = <0>;
-			#interrupt-cells = <1>;
+			#interrupt-cells = <3>;
 			reg = <0xf01000 0x1000>, // distributer registers
 			      <0xf00100 0x0100>; // CPU if registers
 		};
@@ -80,7 +80,7 @@
 		pl310@f02000 {
 			compatible = "arm,pl310";
 			reg = <0xf02000 0x1000>;
-			interrupts = <34>;
+			interrupts = <0 2 4>;
 			interrupt-parent = <&GIC>;
 		};
 
@@ -88,7 +88,7 @@
 		devcfg: devcfg@7000 {
 			compatible = "xlnx,zy7_devcfg";
 			reg = <0x7000 0x1000>;
-			interrupts = <40>;
+			interrupts = <0 8 4>;
 			interrupt-parent = <&GIC>;
 		};
 
@@ -110,7 +110,7 @@
 			#size-cells = <0>;
 			reg = <0xf00200 0x100>,	// Global Timer Regs
 			      <0xf00600 0x20>;	// Private Timer Regs
-			interrupts = < 27 29 >;
+			interrupts = <1 11 1>, <1 13 1>;
 			interrupt-parent = <&GIC>;
 		};
 
@@ -119,7 +119,7 @@
 			device_type = "watchdog";
 		 	compatible = "xlnx,zy7_wdt";
 		 	reg = <0x5000 0x1000>;
-		 	interrupts = <41>;
+		 	interrupts = <0 9 1>;
 		 	interrupt-parent = <&GIC>;
 		};
 
@@ -127,7 +127,7 @@
 		 	device_type = "watchdog";
 		 	compatible = "arm,mpcore_wdt";
 		 	reg = <0xf00620 0x20>;
-		 	interrupts = <30>;
+		 	interrupts = <1 14 1>;
 		 	interrupt-parent = <&GIC>;
 		 	reset = <1>;
 		};
@@ -146,7 +146,7 @@
 		// 	device_type = "serial";
 		// 	compatible = "cadence,uart";
 		// 	reg = <0x0000 0x1000>;
-		// 	interrupts = <59>;
+		// 	interrupts = <0 27 4>;
 		// 	interrupt-parent = <&GIC>;
 		// 	clock-frequency = <50000000>;
 		// };
@@ -155,7 +155,7 @@
 			device_type = "serial";
 			compatible = "cadence,uart";
 			reg = <0x1000 0x1000>;
-			interrupts = <82>;
+			interrupts = <0 50 4>;
 			interrupt-parent = <&GIC>;
 			clock-frequency = <50000000>;
 			current-speed = <115200>;
@@ -164,7 +164,7 @@
 		gpio: gpio@a000 {
 			compatible = "xlnx,zy7_gpio";
 			reg = <0xa000 0x1000>;
-		 	interrupts = <52>;
+		 	interrupts = <0 20 4>;
 		 	interrupt-parent = <&GIC>;
 		};
 
@@ -174,7 +174,7 @@
 
 		 	compatible = "cadence,gem";
 		 	reg = <0xb000 0x1000>;
-			interrupts = <54 55>;
+			interrupts = <0 22 4>;
 			interrupt-parent = <&GIC>;
 			ref-clock-num = <0>;
 		};
@@ -183,7 +183,7 @@
 		sdhci0: sdhci@100000 {
 			compatible = "xlnx,zy7_sdhci";
 			reg = <0x100000 0x1000>;
-			interrupts = <56>;
+			interrupts = <0 24 4>;
 			interrupt-parent = <&GIC>;
 			max-frequency = <50000000>;
 		};
@@ -192,7 +192,7 @@
 		qspi0: qspi@d000 {
 			compatible = "xlnx,zy7_qspi";
 			reg = <0xd000 0x1000>;
-			interrupts = <51>;
+			interrupts = <0 19 4>;
 			interrupt-parent = <&GIC>;
 			spi-clock = <50000000>;
 			ref-clock = <190476000>;
@@ -202,7 +202,7 @@
 		ehci0: ehci@2000 {
 			compatible = "xlnx,zy7_ehci";
 			reg = <0x2000 0x1000>;
-			interrupts = <53>;
+			interrupts = <0 21 4>;
 			interrupt-parent = <&GIC>;
 			phy_vbus_ext;
 		};
Index: sys/boot/fdt/dts/arm/zybo.dts
===================================================================
--- sys/boot/fdt/dts/arm/zybo.dts	(revision 298483)
+++ sys/boot/fdt/dts/arm/zybo.dts	(working copy)
@@ -71,7 +71,7 @@
 			compatible = "arm,gic";
 			interrupt-controller;
 			#address-cells = <0>;
-			#interrupt-cells = <1>;
+			#interrupt-cells = <3>;
 			reg = <0xf01000 0x1000>, // distributer registers
 			      <0xf00100 0x0100>; // CPU if registers
 		};
@@ -80,7 +80,7 @@
 		pl310@f02000 {
 			compatible = "arm,pl310";
 			reg = <0xf02000 0x1000>;
-			interrupts = <34>;
+			interrupts = <0 2 4>;
 			interrupt-parent = <&GIC>;
 		};
 
@@ -88,7 +88,7 @@
 		devcfg: devcfg@7000 {
 			compatible = "xlnx,zy7_devcfg";
 			reg = <0x7000 0x1000>;
-			interrupts = <40>;
+			interrupts = <0 8 4>;
 			interrupt-parent = <&GIC>;
 		};
 
@@ -110,7 +110,7 @@
 			#size-cells = <0>;
 			reg = <0xf00200 0x100>,	// Global Timer Regs
 			      <0xf00600 0x20>;	// Private Timer Regs
-			interrupts = < 27 29 >;
+			interrupts = <1 11 1>, <1 13 1>;
 			interrupt-parent = <&GIC>;
 		};
 
@@ -119,7 +119,7 @@
 			device_type = "watchdog";
 		 	compatible = "xlnx,zy7_wdt";
 		 	reg = <0x5000 0x1000>;
-		 	interrupts = <41>;
+		 	interrupts = <0 9 1>;
 		 	interrupt-parent = <&GIC>;
 		};
 
@@ -127,7 +127,7 @@
 		 	device_type = "watchdog";
 		 	compatible = "arm,mpcore_wdt";
 		 	reg = <0xf00620 0x20>;
-		 	interrupts = <30>;
+		 	interrupts = <1 14 1>;
 		 	interrupt-parent = <&GIC>;
 		 	reset = <1>;
 		};
@@ -146,7 +146,7 @@
 		// 	device_type = "serial";
 		// 	compatible = "cadence,uart";
 		// 	reg = <0x0000 0x1000>;
-		// 	interrupts = <59>;
+		// 	interrupts = <0 27 4>;
 		// 	interrupt-parent = <&GIC>;
 		// 	clock-frequency = <50000000>;
 		// };
@@ -155,7 +155,7 @@
 			device_type = "serial";
 			compatible = "cadence,uart";
 			reg = <0x1000 0x1000>;
-			interrupts = <82>;
+			interrupts = <0 50 4>;
 			interrupt-parent = <&GIC>;
 			clock-frequency = <50000000>;
 			current-speed = <115200>;
@@ -164,7 +164,7 @@
 		gpio: gpio@a000 {
 			compatible = "xlnx,zy7_gpio";
 			reg = <0xa000 0x1000>;
-		 	interrupts = <52>;
+		 	interrupts = <0 20 4>;
 		 	interrupt-parent = <&GIC>;
 		};
 
@@ -174,7 +174,7 @@
 
 		 	compatible = "cadence,gem";
 		 	reg = <0xb000 0x1000>;
-			interrupts = <54 55>;
+			interrupts = <0 22 4>;
 			interrupt-parent = <&GIC>;
 			ref-clock-num = <0>;
 		};
@@ -183,7 +183,7 @@
 		sdhci0: sdhci@100000 {
 			compatible = "xlnx,zy7_sdhci";
 			reg = <0x100000 0x1000>;
-			interrupts = <56>;
+			interrupts = <0 24 4>;
 			interrupt-parent = <&GIC>;
 			max-frequency = <50000000>;
 		};
@@ -192,7 +192,7 @@
 		qspi0: qspi@d000 {
 			compatible = "xlnx,zy7_qspi";
 			reg = <0xd000 0x1000>;
-			interrupts = <51>;
+			interrupts = <0 19 4>;
 			interrupt-parent = <&GIC>;
 			spi-clock = <50000000>;
 			ref-clock = <200000000>;
@@ -202,7 +202,7 @@
 		ehci0: ehci@2000 {
 			compatible = "xlnx,zy7_ehci";
 			reg = <0x2000 0x1000>;
-			interrupts = <53>;
+			interrupts = <0 21 4>;
 			interrupt-parent = <&GIC>;
 		};