FreeBSD-13.0-CURRENT-arm64-aarch64-ROCKPRO64-20201210-7578a4862f0 broken ?

[Søren Schmidt]

> On 13 Dec 2020, at 18.07, Emmanuel Vadot <manu at bidouilliste.com> wrote:
> 
> I have two rockpro64 here.
> 
> The first one was sent to me by Pine when they launched the product
> and the other one I received last month.
> Both are labeled as v2.1 but the first one was produced opn 2018-06-06
> while the second one was on 2018-07-02
> Both works great and boot 100% of the time.
> 
> But there is indeed some difference in the dram setup.
> Boot for the 0606 one :
> U-Boot TPL 2020.10 (Dec 10 2020 - 10:13:59)
> Channel 0: LPDDR4, 50MHz
> BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
> Channel 1: LPDDR4, 50MHz
> BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
> 256B stride
> lpddr4_set_rate: change freq to 400000000 mhz 0, 1
> lpddr4_set_rate: change freq to 800000000 mhz 1, 0
> 
> Boot for the 0702 one :
> U-Boot TPL 2020.10 (Dec 10 2020 - 10:13:59)
> Channel 0: LPDDR4, 50MHz
> BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB
> Channel 1: LPDDR4, 50MHz
> BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB
> 256B stride
> lpddr4_set_rate: change freq to 400000000 mhz 0, 1
> lpddr4_set_rate: change freq to 800000000 mhz 1, 0

Same here 0702 version, outputs the exact same probe as yours.

> Our u-boot ports doesn't do anything weird so I don't think that your
> problem is related to this.
> There is a lot of debug info available in
> https://github.com/u-boot/u-boot/blob/master/drivers/ram/rockchip/sdram_rk3399.c <https://github.com/u-boot/u-boot/blob/master/drivers/ram/rockchip/sdram_rk3399.c>
> so maybe try to compile with debug enabled and see if it logs anything
> useful ?

Went to the official u-boot sources and tried the newest shiniest 2021.01rc3 and it behaves a little bit better, it will boot 1 out of 3 times :)

Probe looks like this now:

U-Boot TPL 2021.01-rc3 (Dec 14 2020 - 23:17:52)
Channel 0: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB
Channel 1: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB
256B stride
lpddr4_set_rate: change freq to 400000000 mhz 0, 1
lpddr4_set_rate: change freq to 800000000 mhz 1, 0


The exact same as before. There is no difference in output from the working boots to the failing ones.
I’ll get on with adding some debug to what parameters get set during memory setup etc.
However I have this gut felling it is timing related and my board might just be too slow/fast for some operation that the ayufan version does slightly different (it boots every time).

Anyhow, when it boots it runs rock stable, it builds worlds etc with no issues..

--
Søren Schmidt
sos at deepcore.dk / sos at freebsd.org
"So much code to hack, so little time"