ODROID C1+ doesn't finish booting on 11-CURRENT after r301062

[Andrew Turner]

This should be fixed in r301890.

Andrew

On Sat, 11 Jun 2016 15:56:09 +0300
Guy Yur <guyyur at gmail.com> wrote:

> Hi,
> 
> My ODROID C1+ gets stuck during boot starting with r301062
> (still gets stuck with r301778).
> 
> Sometimes there are continuous prints of
> "mmcsd0: Error indicated: 1 Timeout".
> When there are no mmcsd timeouts, it still doesn't get to
> the login prompt with last print being the NIC bringup.
> 
> Adding the bellow print code to gic_bind() mask loop,
> I see arm_gic_map[cpu] is 0 when setting one of the IRQs.
> 
> for (mask = 0, cpu = 0; cpu < end; cpu++)
>   if (CPU_ISSET(cpu, cpus)) {
>     mask |= arm_gic_map[cpu];
>     if (arm_gic_map[cpu] != 1 << cpu)
>        device_printf(sc->gic_dev,
>          "irq = %u, cpu = %u, arm_gic_map[cpu] = 0x%08x\n",
>          irq, cpu, arm_gic_map[cpu]);
>   }
> 
> # dmesg | grep -B1 arm_gic_map
> Release APs
> gic0: irq = 32, cpu = 1, arm_gic_map[cpu] = 0x00000000
> 
> # dmesg | grep -B1 arm_gic_map
> Release APs
> gic0: irq = 35, cpu = 2, arm_gic_map[cpu] = 0x00000000
> 
> 
> If I add prints to the end of gic_bind() the board boots fine.
> (Probably because of the delay added by the prints)
> 
> Example:
> device_printf(sc->gic_dev, "irq = %u, mask = 0x%08x\n", irq, mask);
> return (0);
> 
> # dmesg | grep -e "gic0: pn" -e "gic0: irq" -e "Release APs"
> gic0: pn 0x390, arch 0x1, rev 0x1, implementer 0x43b irqs 256
> gic0: irq = 32, mask = 0x00000001
> gic0: irq = 42, mask = 0x00000001
> gic0: irq = 122, mask = 0x00000001
> gic0: irq = 58, mask = 0x00000001
> gic0: irq = 107, mask = 0x00000001
> gic0: irq = 125, mask = 0x00000001
> gic0: irq = 60, mask = 0x00000001
> gic0: irq = 110, mask = 0x00000001
> gic0: irq = 62, mask = 0x00000001
> gic0: irq = 63, mask = 0x00000001
> gic0: irq = 40, mask = 0x00000001
> gic0: irq = 35, mask = 0x00000001
> Release APs
> gic0: irq = 32, mask = 0x00000002
> gic0: irq = 35, mask = 0x00000004
> gic0: irq = 40, mask = 0x00000008
> gic0: irq = 42, mask = 0x00000001
> gic0: irq = 58, mask = 0x00000002
> gic0: irq = 60, mask = 0x00000004
> gic0: irq = 62, mask = 0x00000008
> gic0: irq = 63, mask = 0x00000001
> gic0: irq = 107, mask = 0x00000002
> gic0: irq = 110, mask = 0x00000004
> gic0: irq = 122, mask = 0x00000008
> gic0: irq = 125, mask = 0x00000001
> 
> 
> Thanks,
> Guy
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