GIC - interrupts interpretation in DTS/FDT
Zbigniew Bodek
zbodek at gmail.com
Fri Aug 28 08:35:45 UTC 2015
Hello Mihai,
This documents may be helpful:
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/arm/gic.txt
The meaning of each interrupt cell (for ARM GIC) is described there.
Best regards
zbb
2015-08-28 9:15 GMT+02:00 Mihai Carabas <mihai.carabas at gmail.com>:
> Hi everyone,
>
> In the sys/arm/arm/gic.c there is a comment: "The hardware only supports
> active-high-level or rising-edge". From where is this deducted?
>
> I'm looking in the TRM for Cortex-A15 and there are some interrupts
> active-low-level. E.g.: "Virtual Timer event (PPI4) This is the event
> generated from the virtual timer and uses ID27. The interrupt is active-LOW
> level-sensitive."
>
> Thanks,
> Mihai
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