Fast cycle counter for ARM chips with SCC - patch for review.

[Mark R V Murray]

Hi

I’m aware of this, thanks, but it is not relevant to the cyclecounter (except distantly).

M

On 10 May 2014, at 19:07, Bakul Shah <bakul at bitblocks.com> wrote:

> FYI: BCM2835 has a built in h/w RNG (using a reverse biased transistor as an entropy source). Access to it was enabled in the RPi firmware around Jan 30, 2013. FWIW, it passes rngtest as well as FreeBSD's /dev/random (on x86/amd64) does.
> For the spec. see http://pastehtml.com/view/crkxyohmp.rtxt
> Referenced from this thread: http://www.raspberrypi.org/forums/viewtopic.php?f=29&t=19334&p=273944#p273944
> 
>> On May 10, 2014, at 10:39 AM, Mark R V Murray <markm at FreeBSD.org> wrote:
>> 
>> Hi *
>> 
>> This patch makes the ARM6 kernels that have an SCC coprocessor (RPI and WANDBOARD have them) get a MUCH better implementation of get_cyclecount(9), but not a perfect one. The incrementing rate is good (+- 1 per instruction), but its only 32 bits. Later, if there is interest, I may wish to fix that with an overflow interrupt, but for now its easily good enough for the kernel entropy harvesting service. Also, its MUUUCH more efficient; a simple read rather can calling the internal kernel binuptime(9) clock.
>> 
>> Comments, please? I’m keen to commit.
>> 
>> M
>> -- 
>> Mark R V Murray
>> <arm_ccnt_counter.diff>
>> 

-- 
Mark R V Murray

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