gic.c and interrupt priority mask register (GICC_PMR)

[Ruslan Bukin]

On Sat, Apr 20, 2013 at 11:50:53PM +0200, Damjan Marion wrote:
> 
> On Apr 20, 2013, at 12:31 AM, Thomas Skibo <ThomasSkibo at sbcglobal.net> wrote:
> 
> > 
> > Hello.
> > 
> > I mentioned this as an aside in another email but I'd like to revisit it.
> > 
> > My Zynq port doesn't work unless I initialize the GIC interrupt priority mask register (GICC_PMR) which I do in a hack in zy7_machdep.c.  The GICC_PMR register is never touched in gic.c and I wonder how other ARM ports work without having it initialized.  I figure either they use a different interrupt controller, their GIC implementation has a different reset value for the PMR, or a boot-loader sets up the register before the kernel is entered.
> > 
> > The ARM Generic Interrupt Controller Architecture Specification (version 2.0) states that the reset value of GICC_PMR is 0 which masks all interrupts.  So shouldn't gic.c initialize it to 0xff if the PMR functionality isn't used?
> > 
> > --Thomas
> 
> Hi Thomas,
> 
> Makes sense. GIC is used on several platforms so i guess those implementations have different reset value.
> 
> I can commit this if nobody objects.
> 

Exynos4,5 have also GICC_PMR == 0 masking all interrupts by default. 
So it is very important to commit it.

-Ruslan