Cache write-back issue on Marvell SoC (SheevaPlug)

[Kristof Provost]

On 2012-06-21 12:47:38 (+0300), Alexander Motin <mav at FreeBSD.org> wrote:
> Unluckily I have no idea in arm assembler and cache control
> interfaces. Could somebody recheck existing D-cache range write-back
> code, because there seems to be a problem?
> 
There's a general problem with the Kirkwood (and possibly other chips, I
don't know) in that area.

I've run into similar problems on my OpenRD, using a USB stick.

There's a little more information in arm/158950.

Regards,
Kristof