Few issues with Marvell code

[Damjan Marion]

Hi,

During my attempt to bring up 88F5181L I found few issues with current marvell code:

1. There is a typo in sys/arm/mv/common.c

-       { "mvrl,pcie", &decode_win_pcie_setup, NULL },
+       { "mrvl,pcie", &decode_win_pcie_setup, NULL },


2. Even if this is fixed, decode_win_pcie_setup will not be executed as in FDT file pci tree sits outside of SOC tree


3. CPU decode windows setup in FDT localbus tree is missing target, instead target is hardcoded to 1:

	cpu_win_tbl[t].target = 1; 

On other side 1st column looks like a sequence. Is this 1st column needed? 
Can we extend this definition to also have target defined?

I.e. In case of 88F5181L I need to add following window, and it will be more convenient to do that in FDT file.

	cpu_win_tbl[++t].target = 0x04;
	cpu_win_tbl[t].attr = 0x79;
	cpu_win_tbl[t].base = 0xf0000000;
	cpu_win_tbl[t].size = 0x01000000;
	cpu_win_tbl[t].remap = -1;


Thanks,

Damjan