Adding members to struct cpu_functions

Rafal Jaworowski raj at semihalf.com
Mon Oct 12 11:15:44 UTC 2009


On 2009-10-08, at 18:13, Mark Tinguely wrote:

> 			-- on a tangent about the future --
> Since the ARMv7 is coming to FreeBSD, there are other ARMv4/5 vrs  
> ARMv6/7
> questions, the most important is should we break the new ARM chips  
> with
> their physical tagged caches to another subbranch or define it into  
> the
> existing code? One example of the existing pmap code that does not  
> mesh
> well with ARMv6/7 is the exisiting flush of the level 2 cache  
> because the
> old archs have VIVT level 2 caches). ARMv6/7 level 2 caches are PIPT,
> and would not be flushed until DMA time. A simple solution would be if
> an arch needs to flush the level 2 cache when it flushes the level 1
> cache, then it should do so in the level 1 cache flushing routine.

I was wondering whether a separate pmap module for ARMv6-7 would not  
be the best approach. After all v6-7 should be considered an entirely  
new architecture variation, and we would avoid the very likely #ifdefs  
hell in case of a single pmap.c.

Rafal



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