ARM mfc list

[Andrew Thompson]

On Fri, Jul 25, 2008 at 11:17:51AM -0700, Andrew Thompson wrote:
> Hi,
> 
> I would like to do a large merge of arm fixes to 7-stable, some bugfixes
> and many just to reduce diffs. In particular 174051+177457+177459 fix
> usb on the avila board.
> 
> The commit logs and diffs can also be found at
>  http://people.freebsd.org/~thompsa/arm-mfc/
> 
> Please review this list and let me know if anything shouldnt be merged
> (or if you would like to handle your own commits).

This has been completed.


regards,
Andrew

> r172568 (kevlo) Spelling fix for interupt -> interrupt
> 
> r172613 (cognet) Define _ARM_ARCH_5E too, so that we know if
>         pld/strd/ldrd are available.
> 
> r172614 (cognet) Do not use __XSCALE__ to detect if pld/strd/ldrd is
>         available, use_ARM_ARCH_5E instead.
> 
> r172738 (imp) Merge support from p4 (from NetBSD) for arm9e and arm10,
>         arm11 cores.
> 
> r172739 (imp) correct guard variable names.
> 
> r173155 (imp) kill commented out line of code.
> 
> r173215 (kevlo) Don't define get_cachetype() for CPU_ARM9E unless it's
>         going to be used.
> 
> r173249 (kevlo) __CPU_XSCALE_PXA2XX -> CPU_XSCALE_PXA2X0
> 
> r173336 (cognet) Remove a staled comment, NPE-C should work fine.
> 
> r173442 (cognet) Add entries for the L2 cache-related functions for armv5.
> 
> r174051 (cognet) Correct the logic : we can just invalidate the cache
>         lines, and notwrite-back them, only if PREWRITE is not set, and
>         if the buffer iscache-line aligned.
> 
> r174058 (cognet) Fixes for ARM9/ARM10 :Call uma_sel_align() there at
>         well.Set CPU_CONTROL_VECRELOC if we're using the high vectors page.
> 
> r174176 (cognet) Move the strongarm-specific files from conf/files.arm
>         to sa11x0/files.sa11xO.
> 
> r174700 (kevlo) Use M_NOWAIT instead of M_WAITOK to cause malloc() to
>         return NULL
> 
> r174781 (imp) Actually program the interrupt controller for priorities.
>         As wesupport more AT91 platforms, we'll need to move this into
>         someplatform init routine.
> 
> r175120 (cognet) Add a missing \n.
> 
> r176759 (kevlo) Convert to be a 2-clause bsd-only license.
> 
> r177103 (raj) Improve ARM bus_dmamap_load_buffer() error handling.
> 
> r177105 (raj) Respect RF_SHAREABLE flag in ARM nexus_setup_intr()
> 
> r177457 (sam) Correct cache handling for xfer requests marked
>         URQ_REQUEST: many (if notall uses) involve a read but
>         usbd_start_transfer only does a PREWRITE; changethis to
>         BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE as I'm not sure if
>         anyusers do write+read.
> 
> r177459 (sam) Workaround design botch in usb: blindly mixing bus_dma
>         with PIO does notwork on architectures with a write-back cache
>         as the PIO writes end upin the cache which the
>         sync(BUS_DMASYNC_POSTREAD) in usb_transfer_completethen
>         discards; compensate in the xfer methods that do PIO by pushing
>         thewrites out of the cache before usb_transfer_complete is
>         called.
> 
> r177505 (sam) Improve mac+phy configuration so that hints can be used to
>         describelayouts different than the defaults:o
>         hint.npe.0.mac="A", "B", etc. specifies the window for MAC
>         register accesseso hint.npe.0.mii="A", "B", etc. specifies PHY
>         registerso hint.npe.1.phy=%d specifies the PHY to map to a port
> 
> r177874 (imp) KERNBASE + 0x00200000 is the same thing as KERNVIRTADDR on
>         thisplatform, so use the latter in preference to the former.
>         This makesthe fake_preload setup be the same between
>         kb920x_machdep.c andavila_machdep.c....
> 
> r177883 (imp) Take the first baby step towards unifying and cleaning up
>         arminit():
>         - Pull all the code to deal with the trampoline stuff into one
>           centeralized place and use it from everywhere.
>         - Some minor style tidiness
> 
> r177886 (raj) Fix AVILA build.
> 
> r177887 (raj) Refactor certain ARM bus space methods: instead of having
>         multiple copies ofthe same code introduce
>         sys/arm/arm/bus_space_generic.c for a shared set ofroutines.
> 
> r177888 (raj) Now really add the bus_space_generic.c file...
> 
> r177916 (raj) Make kernel.tramp build properly on ARM9E.
> 
> r177943 (cognet) Add bus_space_generic.c for the i81342 as well.
> 
> r177944 (cognet) Remove bus_space_generic.c from the per-plarform files.
>         Having it in theper-cpu files should be enough.
> 
> r178001 (kevlo) Remove some long-dead code
> 
> r179375 (imp) Release the resources for the registers for the TWI device
>         withSYS_RES_MEMORY to match how we allocate them...
> 
> r179664 (kevlo) Remove sa1_cache_clean_addr
> 
> r179693 (wkoszek) Since we create a DMA tag "mtag" for TX map with
>         bus_dmamap_create(),we must synchronize such a map against
>         "mtag" with bus_dmamap_sync(),not the tag designated for RX map.
> 
> r179745 (kevlo) Fix a typo: i80321_pci_probe -> i81342_pci_probe
> 
> r180486 (ticso) fix multicast hash register definition
> 
> r180584 (alc) Eliminate unused global variables.  (These global
>         variables became fields ofstruct kva_md_info many years ago.)
> 
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