help with sandybridge/ivybridge hwpmc NUMA DRAM counters

[Adrian Chadd]

On 23 April 2015 at 00:22, Slawa Olhovchenkov <slw at zxy.spb.ru> wrote:
> On Thu, Apr 23, 2015 at 12:20:14AM -0700, Adrian Chadd wrote:
>
>> Yeah, on stable/10. But on -HEAD it's different. There's two entries -
>> one for d3_01 and one for d3_03.
>
> What CPU model?

CPU: Intel(R) Xeon(R) CPU E5-2650 v2 @ 2.60GHz (2600.06-MHz K8-class CPU)
  Origin="GenuineIntel"  Id=0x306e4  Family=0x6  Model=0x3e  Stepping=4



-adrian