Intel MPX (Skylake ISA) support?

[Konstantin Belousov]

On Sat, Sep 13, 2014 at 09:47:10PM +0200, Carsten Mattner wrote:
> On Sat, Sep 13, 2014 at 6:20 PM, Konstantin Belousov
> <kostikbel at gmail.com> wrote:
> > On Sat, Sep 13, 2014 at 12:45:16PM +0200, Carsten Mattner wrote:
> >> Are there any plans to include the necessary (kernel, libc) support for
> >> Intel MPX (https://en.wikipedia.org/wiki/Intel_MPX)?
> >
> > I looked at this several times. The 319433 (Instructions Set Extensions
> > prog reference) even at the current revision 20 still seems to not provide
> > the complete documentation on the CPU side.  E.g., could you point me at
> > the description of the save area for MPX ?  It is required since usermode
> > bndcfg register can only be set by restoring from the XSAVE area.
> >
> > That said, I believe that most, if not all, of the needed kernel-side
> > support is already there by the generic XSAVE code.
> >
> > I never see any specification of runtime services expected by the code
> > generated by mpx-enabled gcc.
> 
> Is https://lkml.org/lkml/2014/9/11/182 helpful?

Not for me. I have zero interest in reverse-engineering Linux code
for core CPU functionality. Intel usually provides high-quality
documentation for the processors, and I hope that they will provide all
needed information together with the hardware release.

Another significant missing piece is the lack of description of the
initial state and expectation of the runtime support in the ABI
document. The ABI draft 0.3 from July 17, 2013, specially edited for
MPX, only talks about argument passing conventions and dwarf, it seems.

It is curious discussion about non-feasibility of implementing MPX
translation tables in usermode.  Just for fun, I will try to do
something purely in usermode (when/if hardware will be available).
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