HyperThreading and CPU topologies.
Marcel Moolenaar
marcel at xcllnt.net
Thu Jun 12 11:03:42 PDT 2003
On Thu, Jun 12, 2003 at 01:45:52PM +0200, Poul-Henning Kamp wrote:
> In message <20030612051553.J36168-100000 at mail.chesapeake.net>, Jeff Roberson wr
> ites:
> >Index: smp.h
> >===================================================================
> >RCS file: /home/ncvs/src/sys/sys/smp.h,v
> >retrieving revision 1.72
> >diff -r1.72 smp.h
> >19a20,46
> >>
> >> /*
> >> * Topology of a NUMA or HTT system.
> >> *
> >> * The top level topology is an array of pointers to groups. Each group
> >> * contains a bitmask of cpus in its group or subgroups. It may also
> >> * contain a pointer to an array of child groups.
> >> *
> >> * The bitmasks at non leaf groups may be used by consumers who support
> >> * a smaller depth than the hardware provides.
> >> *
> >> * The topology may be omitted by systems where all CPUs are equal.
> >> */
> >>
> >> struct cpu_group {
> >> int cg_mask; /* Mask of cpus in this group. */
>
> u_int ?
>
> uint32_t ?
It's best to make it MD depedendent. I prefer 64-bit masks in ia64.
--
Marcel Moolenaar USPA: A-39004 marcel at xcllnt.net
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