Athlon64 board with ECC support?

[Peter Wemm]

On Friday 24 June 2005 06:48 am, Jose M Rodriguez wrote:
> El Viernes, 24 de Junio de 2005 15:34, David O'Brien escribió:
> > On Thu, Jun 23, 2005 at 06:18:56PM -0400, Martin Cracauer wrote:
> > > And I suppose the BIOS needs to support it, too,
> >
> > Correct.
> >
> > > although it is not
> > > clear to me how ECC exceptions are supposed to be routed anyway.
> > > Clearly some chip not being CPU or RAM needs to have a say in the
> > > exception delivery? Anybody understands how this works?
> >
> > Why??  The memory controller is on the same die as the CPU.  The
> > exception is handled w/in the CPU and it never goes out to any
> > support chip.
>
> Are you sure the mem. controller in the CPU is not
> configured/affected by GPIO bits in the southbridge?

Absolutely sure.  The bios support that is needed is that it needs to 
test the SPD parameters on the dimms (like it does when sizing memory) 
and turn on ECC mode in the memory controller.  The effect of this is 
that all existing memory is garbled because ECC encodes 64 bits of data 
to spread it across 72 bits of memory.  

If the bios has used a temporary scratch area during startup, then it 
will have to start over once the ECC mode if toggled.  However, most of 
the bios startup code runs entirely from rom with registers only until 
memory is configured so this is mostly irrelevant.

ECC errors are signalled by doing a CRC-error flood on the HT bus if 
memory serves correctly.  Various logic in the HT bridges convert this 
into the eqivalent of a PCI #SERR and/or NMI.  Note that this happens 
regardless of whether ECC is supported because that is how fatal PCI 
errors are reported.

Anyway, there only motherboard requirements for ECC are:
1) all 72 pins of the dimms need to be wired up.
2) the bios needs to turn on ECC mode in the memory controller.
Thats it.

Some motherboard makers neglect to include an ECC option because they 
don't see the point of it it because there is a small speed penalty in 
certain benchmarks.  That's why ECC defaults often to 'off' in bios 
settings on consumer motherboards.  ECC requires that a single random 
byte being written to memory turn into a read-merge-write of the 64 bit 
group as a whole.

The system chipset is NOT A FACTOR in this.  If a motherboard doesn't 
support ECC, it is purely motherboard manufacturer laziness and nothing 
to do with the chipset.
-- 
Peter Wemm - peter at wemm.org; peter at FreeBSD.org; peter at yahoo-inc.com
"All of this is for nothing if we don't go to the stars" - JMS/B5