RELENG_5 panic: page fault while in kernel mode

Pierre Beyssac beyssac at
Wed Jan 5 11:48:48 PST 2005


I have the following reproductible panic (during a make release,
oddly enough when creating README.html for each port) on a Xeon box
(Dell PowerEdge 2850, double Xeon 2.8GHz, 4GB RAM) in amd64 mode.
It's a up-to-date RELENG_5.

Perhaps the following is related to the crash: the box is equipped
with 4GB RAM, 768MBytes of which are situated above the 4G mark and
are not accessible (causing a warning in i386 mode except with PAE
which hangs at boot, but that is another story). In amd64 mode, as
the kernel doesn't notice the 4G mark/wraparound, I have to force
hw.physmem to a (conservative) 3200000000 to get a stable system.

Fault trap 12 : page fault while in kernel mode
Instruction pointer: 0x8:0xffffffff80334a78
Fault address 0x1c0
Process: sh

   0xffffffff80334a60 <cpu_throw+0>:       mov    %gs:0x3c,%eax
   0xffffffff80334a68 <cpu_throw+8>:       test   %rdi,%rdi
   0xffffffff80334a6b <cpu_throw+11>:      je     0xffffffff80334a80 <cpu_throw+32>
   0xffffffff80334a6d <cpu_throw+13>:      mov    0x0(%rdi),%rdx
   0xffffffff80334a71 <cpu_throw+17>:      mov    0x118(%rdx),%rdx
-> 0xffffffff80334a78 <cpu_throw+24>:      lock btr %eax,0x1c0(%rdx)
   0xffffffff80334a80 <cpu_throw+32>:      mov    0x1a0(%rsi),%rdx
   0xffffffff80334a87 <cpu_throw+39>:      mov    0x40(%rdx),%rdx
   0xffffffff80334a8b <cpu_throw+43>:      mov    %rdx,%cr3
   0xffffffff80334a8e <cpu_throw+46>:      mov    0x0(%rsi),%rdx
   0xffffffff80334a92 <cpu_throw+50>:      mov    0x118(%rdx),%rdx
   0xffffffff80334a99 <cpu_throw+57>:      lock bts %eax,0x1c0(%rdx)
   0xffffffff80334aa1 <cpu_throw+65>:      jmpq   0xffffffff80334bfe <sw1>
A: Yes.					  Pierre Beyssac pb at
>Q: Are you sure?
>>A: Because it reverses the logical flow of conversation.
>>>Q: Why is top posting annoying in email?

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