-mno-sse -mno-sse2 -mno-mmx -mno-3dnow when compiling kernel

[Scott Long]

Thomas Krause -CI- wrote:

> Hello,
> why are the Switches "-mno-sse -mno-sse2 -mno-mmx -mno-3dnow" are set
> when compiling an amd64 kernel? I think, the CPU supports all thease
> features.
> 
> Features=0x78bfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,MMX,FXSR,SSE,SSE2> 
> 
> 
> I have no CPUTYPE specified in /etc/make.conf, as I could not
> find a matching option in /usr/src/share/examples/etc/make.conf.
> 
> Kind regards,
> Thomas


Floating point, MMX, SSE, SSE2, and 3dnow, registers are not usable in
the kernel.  By not using these registers, we save the expense of saving
and restoring them on every single syscall.  Using them without saving
them would run the risk of colliding with userland programs that do use
them.

Whether or not the kernel is compiled with instructions that use these
registers has absolutely no bearing on whether userland code can use
them.  It's purely about trading one optimization (using optimized
opcodes in the kernel) for another (not having to save and restore
dozens of registers to the stack on each syscall).  It might be
interesting to experiment with allowing a certain class of instructions
in the kernel and saving and restoring the associated registers, and
seeing if GCC will actually generate code that is better and overcomes
the save/restore expense.  Any takers?

Scott