pci access question

[John Baldwin]

On Saturday 25 April 2009 3:08:01 pm William Grzybowski wrote:
> Hi,
> 
> I was reading some code and running some tests in freebsd and some doubts 
came out.
> 
> I know this is not a school but I would like to ask some questions regarding 
8086 architecture and pci access, I really appreciate if someone could answer 
or point me to some good book.
> 
> As far as I can understund the pci controllers have some registers which the 
cpu can read and write stuff.
> Everythings starts with the host pci bridge bus, this bus is define as _BBN 
in the acpi and is 0 when it is not set. 
> Then for every pci controller attached to this bus the interrupt routing 
table is set so this bridge can control them properly. If any of them is a 
pci controller of the type pci bridge this process is repeated.
> 
> This is how I would describe in a very simple way how the process works with 
my limited knowledge.
> 
> My questions would be:
> 
> Does ACPI directly inteferes in how pci regs are accesses somehow or a 
pci_cfgregread is 100% inpendent just with proper locks and asm inb, inl, inw 
instructions after setting the bus and slot/func?

ACPI does not interfere with PCI config access.  It is all done by using I/O 
port access to 0xcf8 and 0xcfc.  Newer PCI express systems do support an 
alternative method of PCI config access using a memory-mapped I/O window.  
(That is what pcie_cfgreg* implement.)  ACPI does provide a table ('MCFG') 
that describes the available memory windows, but the BIOS does not provide 
any public AML methods to manage PCI config access.

> How does the bridge discovers the pci controllers attached to the bus? Is 
there some kind of signal or all possible addresses are tested?

When scanning a PCI bus, all possible addresses are tested.  Look at 
pci_add_children() in sys/dev/pci/pci.c.  When a PCI-PCI bridge driver 
attaches to a PCI-PCI bridge it scans its child bus during its attach 
routine.  This is all using methods defined in the PCI standard which are 
true for all PCI implementations.  One thing PCI does not define is how to 
enumerate the list of Host-PCI bridges.  ACPI provides this by giving each 
top-level PCI bus a separate device node with a _BBN method in the ACPI 
namespace.  Other architectures and firmwares provide this info via different 
methods.

> Does the pci bridges need to be initialized by the OS (by initialized i mean 
set some registers in the controller or something)?

Well, the firmware often does some of the setup, but it is not required to.  
There are all sorts of setup an OS may need to do.  It may need to assign bus 
numbers to PCI-PCI bridges.  It may need to assign resources to BARs on 
devices and to I/O windows on PCI-PCI bridges to provide resources to BARs on 
devices behind the bridges.

> Again, sorry for asking this here, probably not the right place, but I would 
love any kind of "light", specially a good book about it.

For PCI stuff, the Mindshare 'PCI System Architecture' book is what I use.

-- 
John Baldwin