Fan Control Success on IBM T40? (another quick Q)

[John Baldwin]

On Wednesday 28 April 2004 05:24 pm, Nate Lawson wrote:
> On Wed, 28 Apr 2004, Kevin Oberman wrote:
> > > Date: Wed, 28 Apr 2004 13:15:13 -0700 (PDT)
> > > From: Nate Lawson <nate at root.org>
> > > Sender: owner-freebsd-acpi at freebsd.org
> > >
> > > I forgot to add -- the reason the clock rate announced at boot time is
> > > different is because the test for CPU TSC is done before acpi is
> > > enabled. At some point when the SMI is disabled and acpi enabled, the
> > > clock rate is switched by your BIOS to the lower rate.  You can see
> > > this because the clock rate announced by the TSC timecounter will be
> > > ~600 mhz while the initial boot clock rate will list ~1600 mhz.
> >
> > This all makes sense, but it conflicts a bit with my
> > observations. (Probably implies something bad about my powers of
> > observation.)
> >
> > I boot and the system (T30) is running at 1.8 GHz. I throttle the CPU.
> > Testing clearly shows that the throttling is working. I use the test you
> > suggested of calculating an MD5 hash of a big string of zeros.
> >
> > But, when I "count cycles" to test the CPU speed (code appended), I
> > still see 1.8 GHz.
> >
> > Why don't I see the speed reduced when throttling? I suspect my lack of
> > fundamental understanding of the interactions of throttling and the ACPI
> > clock.
>
> This is totally different.  You aren't using SpeedStep/performance states,
> only throttling.  Throttling works by changing the duty cycle but with the
> SAME base clock rate.  Since the TSC comes from the base rate, your test
> reading the TSC will never change.

Also, even with SpeedStep, the CPU will "fake" the TSC so that it stays at a 
constant rate even when the CPU is throttled down to a slower speed.  I think 
that's what the 'ACPI' bit in the cpu_features indicates.

-- 
John Baldwin <jhb at FreeBSD.org>  <><  http://www.FreeBSD.org/~jhb/
"Power Users Use the Power to Serve"  =  http://www.FreeBSD.org