git: 8c439847f0d3 - main - riscv: Include spibus and spigen in GENERIC

[Jessica Clarke]

The branch main has been updated by jrtc27:

URL: https://cgit.FreeBSD.org/src/commit/?id=8c439847f0d33fdb79f2bbdced4c300a620d74f5

commit 8c439847f0d33fdb79f2bbdced4c300a620d74f5
Author:     Jessica Clarke <jrtc27 at FreeBSD.org>
AuthorDate: 2021-07-21 05:46:09 +0000
Commit:     Jessica Clarke <jrtc27 at FreeBSD.org>
CommitDate: 2021-07-21 05:46:09 +0000

    riscv: Include spibus and spigen in GENERIC
    
    We already attempt to enable the SiFive SPI controller, but since spibus
    isn't enabled it isn't actually built.
    
    Reviewed by:    kp, philip
    MFC after:      1 week
    Differential Revision:  https://reviews.freebsd.org/D31027
---
 sys/riscv/conf/GENERIC | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/sys/riscv/conf/GENERIC b/sys/riscv/conf/GENERIC
index 4c31e5dcf31d..c6cd8e0fdedb 100644
--- a/sys/riscv/conf/GENERIC
+++ b/sys/riscv/conf/GENERIC
@@ -122,6 +122,10 @@ device		xae		# Xilinx AXI Ethernet MAC
 device		xdma		# DMA interface
 device		axidma		# Xilinx AXI DMA Controller
 
+# SPI
+device		spibus
+device		spigen
+
 # Uncomment for memory disk
 # options 	MD_ROOT
 # options 	MD_ROOT_SIZE=32768	# 32MB ram disk