git: 06eba90acb62 - stable/12 - atomic: add atomic_interrupt_fence()

[Konstantin Belousov]

The branch stable/12 has been updated by kib:

URL: https://cgit.FreeBSD.org/src/commit/?id=06eba90acb6201bbf2af76ca8acee5232abf9f82

commit 06eba90acb6201bbf2af76ca8acee5232abf9f82
Author:     Konstantin Belousov <kib at FreeBSD.org>
AuthorDate: 2021-02-23 22:12:29 +0000
Commit:     Konstantin Belousov <kib at FreeBSD.org>
CommitDate: 2021-03-03 07:07:05 +0000

    atomic: add atomic_interrupt_fence()
    
    (cherry picked from commit e2494f7561c852951d8ac567314f5e12f19ee7af)
---
 share/man/man9/atomic.9 | 13 ++++++++++++-
 sys/sys/atomic_common.h |  2 ++
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/share/man/man9/atomic.9 b/share/man/man9/atomic.9
index 914da97764f0..7e72d127e168 100644
--- a/share/man/man9/atomic.9
+++ b/share/man/man9/atomic.9
@@ -22,7 +22,7 @@
 .\"
 .\" $FreeBSD$
 .\"
-.Dd August 18, 2019
+.Dd February 24, 2021
 .Dt ATOMIC 9
 .Os
 .Sh NAME
@@ -31,6 +31,7 @@
 .Nm atomic_cmpset ,
 .Nm atomic_fcmpset ,
 .Nm atomic_fetchadd ,
+.Nm atomic_interrupt_fence ,
 .Nm atomic_load ,
 .Nm atomic_readandclear ,
 .Nm atomic_set ,
@@ -59,6 +60,8 @@
 .Fc
 .Ft <type>
 .Fn atomic_fetchadd_<type> "volatile <type> *p" "<type> v"
+.Ft void
+.Fn atomic_interrupt_fence "void"
 .Ft <type>
 .Fn atomic_load_[acq_]<type> "volatile <type> *p"
 .Ft <type>
@@ -290,6 +293,14 @@ release stores, by separating access from ordering, they can sometimes
 facilitate more efficient implementations of synchronization primitives.
 For example, they can be used to avoid executing a memory barrier until a
 memory access shows that some condition is satisfied.
+.Ss Interrupt Fence Operations
+The
+.Fn atomic_interrupt_fence()
+function establishes ordering between its call location and any interrupt
+handler executing on the same CPU.
+It is modeled after the similar C11 function
+.Fn atomic_signal_fence() ,
+and adapted for the kernel environment.
 .Ss Multiple Processors
 In multiprocessor systems, the atomicity of the atomic operations on memory
 depends on support for cache coherence in the underlying architecture.
diff --git a/sys/sys/atomic_common.h b/sys/sys/atomic_common.h
index 16db4a81eb28..3d1920069362 100644
--- a/sys/sys/atomic_common.h
+++ b/sys/sys/atomic_common.h
@@ -70,4 +70,6 @@
     (*(volatile uint64_t *)(p) = (uint64_t)(v))
 #endif
 
+#define	atomic_interrupt_fence()	__compiler_membar()
+
 #endif