git: ddb928096bff - main - dts: fsl-ls1028a: Correct ECAM PCIE window ranges

[Marcin Wojtas]

The branch main has been updated by mw:

URL: https://cgit.FreeBSD.org/src/commit/?id=ddb928096bff38faf243af83d6b861f2337d955a

commit ddb928096bff38faf243af83d6b861f2337d955a
Author:     Kornel Duleba <mindal at semihalf.com>
AuthorDate: 2021-07-01 18:21:17 +0000
Commit:     Marcin Wojtas <mw at FreeBSD.org>
CommitDate: 2021-07-01 18:23:40 +0000

    dts: fsl-ls1028a: Correct ECAM PCIE window ranges
    
    Currently all PCIE windows point to bus address 0x0, which does not match
    the values obtained from hardware during EA.
    Replace those values with CPU addresses, since in reality we
    have a 1:1 mapping between the two.
    
    This patch is queued for Linux v5.14 in linux-next tree:
    6bee93d93111 "arm64: dts: fsl-ls1028a: Correct ECAM PCIE window ranges"
---
 .../device-tree/src/arm64/freescale/fsl-ls1028a.dtsi       | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/sys/contrib/device-tree/src/arm64/freescale/fsl-ls1028a.dtsi b/sys/contrib/device-tree/src/arm64/freescale/fsl-ls1028a.dtsi
index a30249ebffa8..63ff60bd8ec9 100644
--- a/sys/contrib/device-tree/src/arm64/freescale/fsl-ls1028a.dtsi
+++ b/sys/contrib/device-tree/src/arm64/freescale/fsl-ls1028a.dtsi
@@ -990,19 +990,19 @@
 			msi-map = <0 &its 0x17 0xe>;
 			iommu-map = <0 &smmu 0x17 0xe>;
 				  /* PF0-6 BAR0 - non-prefetchable memory */
-			ranges = <0x82000000 0x0 0x00000000  0x1 0xf8000000  0x0 0x160000
+			ranges = <0x82000000 0x1 0xf8000000  0x1 0xf8000000  0x0 0x160000
 				  /* PF0-6 BAR2 - prefetchable memory */
-				  0xc2000000 0x0 0x00000000  0x1 0xf8160000  0x0 0x070000
+				  0xc2000000 0x1 0xf8160000  0x1 0xf8160000  0x0 0x070000
 				  /* PF0: VF0-1 BAR0 - non-prefetchable memory */
-				  0x82000000 0x0 0x00000000  0x1 0xf81d0000  0x0 0x020000
+				  0x82000000 0x1 0xf81d0000  0x1 0xf81d0000  0x0 0x020000
 				  /* PF0: VF0-1 BAR2 - prefetchable memory */
-				  0xc2000000 0x0 0x00000000  0x1 0xf81f0000  0x0 0x020000
+				  0xc2000000 0x1 0xf81f0000  0x1 0xf81f0000  0x0 0x020000
 				  /* PF1: VF0-1 BAR0 - non-prefetchable memory */
-				  0x82000000 0x0 0x00000000  0x1 0xf8210000  0x0 0x020000
+				  0x82000000 0x1 0xf8210000  0x1 0xf8210000  0x0 0x020000
 				  /* PF1: VF0-1 BAR2 - prefetchable memory */
-				  0xc2000000 0x0 0x00000000  0x1 0xf8230000  0x0 0x020000
+				  0xc2000000 0x1 0xf8230000  0x1 0xf8230000  0x0 0x020000
 				  /* BAR4 (PF5) - non-prefetchable memory */
-				  0x82000000 0x0 0x00000000  0x1 0xfc000000  0x0 0x400000>;
+				  0x82000000 0x1 0xfc000000  0x1 0xfc000000  0x0 0x400000>;
 
 			enetc_port0: ethernet at 0,0 {
 				compatible = "fsl,enetc";