cvs commit: src/sys/amd64/amd64 mp_machdep.c src/sys/i386/i386 mp_machdep.c

[Dmitry Morozovsky]

On Mon, 24 Apr 2006, Colin Percival wrote:

CP>   Adjust dangerous-shared-cache-detection logic from "all shared data
CP>   caches are dangerous" to "a shared L1 data cache is dangerous".  This
CP>   is a compromise between paranoia and performance: Unlike the L1 cache,
CP>   nobody has publicly demonstrated a cryptographic side channel which
CP>   exploits the L2 cache -- this is harder due to the larger size, lower
CP>   bandwidth, and greater associativity -- and prohibiting shared L2
CP>   caches turns Intel Core Duo processors into Intel Core Solo processors.
CP>   
CP>   As before, the 'machdep.hyperthreading_allowed' sysctl will allow even
CP>   the L1 data cache to be shared.

Any chance to MFC this to upcoming releases?

Sincerely,
D.Marck                                     [DM5020, MCK-RIPE, DM3-RIPN]
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*** Dmitry Morozovsky --- D.Marck --- Wild Woozle --- marck at rinet.ru ***
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