cvs commit: src/sys/amd64/amd64 cpu_switch.S machdep.c

[Andrew Gallatin]

Scott Long writes:
 > Andrew Gallatin wrote:
 > > As I pointed out in another thread, both linux and solaris do it.
 > > Solaris seems to have a nice algorithm for keeping things in sync, and
 > > accounting for the TSC getting cleared after suspend/resume etc.  At
 > > my level of understanding, this argument is nothing more than "but
 > > Mom, all the other kids are doing it".  I was just hoping that
 > > somebody with real understanding could pick up on it.
 > 
 > Steering mutliple TSC's together isn't that hard and there are plenty of
 > examples, as you point out.  Accounting for the changes due to thermal
 > and power management (note that this isn't the same problem as suspend
 > and resume) is what worries me.

Yes, I have no answer for this :(

 > > Yeah.  I moved my back to hz=1000 when I noticed 4000 interrupts/sec
 > > on an idle system.
 > > 
 > > Drew
 > 
 > Do you mean 1000 or 100 here?  Anyways, the high clock interrupt rate is

Sorry.. That was a typo.  I meant hz=100.

Drew