cvs commit: src/sys/sparc64/sparc64 machdep.c

Marius Strobl marius at
Thu Sep 30 14:43:47 PDT 2004

On Thu, Sep 30, 2004 at 10:26:52PM +0200, Poul-Henning Kamp wrote:
> In message <20040930214021.A84755 at>, Marius Strobl writes:
> >> Funny you should ask.  Testing the first version of this patch was how
> >> we found the bug in counter.c - the machine I booted the test kernel
> >> with happened to decide the counter-timer wasn't suitable either due
> >> to the bug and it came up with no timecounters.  You should see what
> >> happens to a machine that's not keeping time.  :-)
> I know :-)
> I wrote the code so you wouldn't be in doubt something was wrong.
> >> We are drastically low on timecounter-capable devices on sparc64
> >> though, it seems the counter-timer and the CPU are about all there
> >> is.
> We just need one good one, so as long as they have that we're fine.
> I thought the 1usec counter were a sparc-architecture thing which
> all machines had ?

Doesn't look like bridges other than the UPA2SBus and the Psycho
UPA2PCI one used on sun4u machines have a counter-timer device or
something similar (look e.g. at which is
equipped with a Sabre UPA2PCI bridge).

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