cvs commit: src/sys/dev/aic7xxx aic79xx.c aic79xx.h aic79xx.reg aic79xx.seq aic79xx_inline.h aic79xx_osm.c aic79xx_pci.c

Justin T. Gibbs gibbs at FreeBSD.org
Sat May 3 17:20:09 PDT 2003


gibbs       2003/05/03 17:20:07 PDT

  FreeBSD src repository

  Modified files:
    sys/dev/aic7xxx      aic79xx.c aic79xx.h aic79xx.reg 
                         aic79xx.seq aic79xx_inline.h 
                         aic79xx_osm.c aic79xx_pci.c 
  Log:
  Correct spelling errors.
  
  Switch to handling bad SCSI status as a sequencer interrupt
  instead of having the kernel proccess these failures via
  the completion queue.  This is done because:
  
   o The old scheme required us to pause the sequencer and clear
     critical sections for each SCB.  It seems that these pause
     actions, if coincident with a sequencer FIFO interrupt, would
     result in a FIFO interrupt getting lost or directing to the
     wrong FIFO.  This caused hangs when the driver was stressed
     under high "queue full" loads.
   o The completion code assumed that it was always called with
     the sequencer running.  This may not be the case in timeout
     processing where completions occur manually via
     ahd_pause_and_flushwork().
   o With this scheme, the extra expense of clearing critical
     sections is avoided since the sequencer will only self pause
     once all pending selections have cleared and it is not in
     a critical section.
  
    aic79xx.c
          Add code to handle the new BAD_SCB_STATUS sequencer
          interrupt code.  This just redirects the SCB through
          the already existing ahd_complete_scb() code path.
          Remove code in ahd_handle_scsi_status() that paused
          the sequencer, made sure that no selections where
          pending, and cleared critical sections.  Bad
          status SCBs are now only processed when all of these
          conditions are true.
  
    aic79xx.reg:
          Add the BAD_SCB_STATUS sequencer interrupt code.
  
    aic79xx.seq:
          When completing an SCB upload to the host, if
          we are doing this because the SCB contains non-zero
          SCSI status, defer completing the SCB until there
          are no pending selection events.  When completing
          these SCBs, use the new BAD_SCB_STATUS sequencer
          interrupt.  For all other uploaded SCBs (currently
          only for underruns), the SCB is completed via the
          normal done queue.  Additionally, keep the SCB that
          is currently being uploaded on the COMPLETE_DMA_SCB
          list until the dma is completed, not just until the
          DMA is started.  This ensures that the DMA is restarted
          properly should the host disable the DMA transfer for
          some reason.
  
          In our RevA workaround for Maxtor drives, guard against
          the host pausing us while trying to pause I/O until the
          first data-valid REQ by clearing the current snapshot
          so that we can tell if the transfer has completed prior
          to us noticing the REQINIT status.
  
          In cfg4data_intr, shave off an instruction before getting
          the data path running by adding an entrypoint to the
          overrun handler to also increment the FIFO use count.
  
          In the overrun handler, be sure to clear our LONGJMP
          address in both exit paths.
  
  Perform a few sequencer optimizations.
  
    aic79xx.c:
          Print the full path from the SCB when a packetized
          status overrun occurs.
  
          Remove references to LONGJMP_SCB which is being
          removed from firmware usage.
  
          Print the new SCB_FIFO_USE_COUNT field in the
          per-SCB section of ahd_dump_card_state().  The
          SCB_TAG field is now re-used by the sequencer,
          so it no longer makes sense to reference this
          field in the kernel driver.
  
    aic79xx.h:
          Re-arrange fields in the hardware SCB from largest
          size type to smallest.  This makes it easier to
          move fields without changing field alignment.
  
          The hardware scb tag field is now down near the
          "spare" portion of the SCB to facilitate reuse
          by the sequencer.
  
    aic79xx.reg:
          Remove LONGJMP_ADDR.
  
          Rearrange SCB fields to match aic79xx.h.
          Add SCB_FIFO_USE_COUNT as the first byte
          of the SCB_TAG field.
  
    aic79xx.seq:
          Add a per-SCB "Fifos in use count" field and use
          it to determine when it is safe (all data posted)
          to deliver status back to the host.  The old method
          involved polling one or both FIFOs to verify that
          the current task did not have pending data.  This
          makes running down the GSFIFO very cheap, so we
          will empty the GSFIFO in one idle loop pass in
          all cases.
  
          Use this simplification of the completion process
          to prune down the data FIFO teardown sequencer for
          packetized transfers.  Much more code is now shared
          between the data residual and transfer complete cases.
  
          Correct some issues in the packetized status handler.
          It used to be possible to CLRCHN our FIFO before status
          had fully transferred to the host.  We also failed to
          handle NONPACKREQ phases that could occur should a CRC
          error occur during transmission of the status data packet.
  
  Correct a few big endian issues:
  
    aic79xx.c:
    aic79xx_inline.h:
    aic79xx_pci.c:
    aic79xx_osm.c:
          o Always get the SCB's tag via the SCB_GET_TAG acccessor
          o Add missing use of byte swapping macros when touching
            hscb fields.
          o Don't double swap SEEPROM data when it is printed.
            Correct a big-endian bug.  We cannot assign a
          o When assigning a 32bit LE variable to a 64bit LE
            variable, we must be explict about how the words
            of the 64bit LE variable are initialized.  Cast to
            (uint32_t*) to do this.
  
  aic79xx.c:
          In ahd_clear_critical_section(), hit CRLSCSIINT
          after restoring the interrupt masks to avoid what
          appears to be a glitch on SCSIINT.  Any real SCSIINT
          status will be persistent and will immidiately
          reset SCSIINT.  This clear should only get rid of
          spurious SCSIINTs.
  
          This glitch was the cause of the "Unexpected PKT busfree"
          status that occurred under high queue full loads
  
          Call ahd_fini_scbdata() after shutdown so that
          any ahd_chip_init() routine that might access
          SCB data will not access free'd memory.
  
          Reset the bus on an IOERR since the chip doesn't
          seem to reset to the new voltage level without
          this.
  
          Change offset calculation for scatter gather maps
          so that the calculation is correct if an integral
          multiple of sg lists does not fit in the allocation
          size.
  
          Adjust bus dma tag for data buffers based on 39BIT
          addressing flag in our softc.
  
          Use the QFREEZE count to simplify ahd_pause_and_flushworkd().
          We can thus rely on the sequencer eventually clearing ENSELO.
  
          In ahd_abort_scbs(), fix a bug that could potentially
          corrupt sequencer state.  The saved SCB was being
          restored in the SCSI mode instead of the saved mode.
          It turns out that the SCB did not need to be saved at all
          as the scbptr is already restored by all subroutines
          called during this function that modify that register.
  
  aic79xx.c:
  aic79xx.h:
  aic79xx_pci.c:
          Add support for parsing the seeprom vital product
          data.  The VPD data are currently unused.
  
  aic79xx.h:
  aic79xx.seq:
  aic79xx_pci.c:
          Add a firmware workaround to make the LED blink
          brighter during packetized operations on the H2A.
  
  aic79xx_inline.h:
          The host does not use timer interrupts, so don't
          gate our decision on whether or not to unpause
          the sequencer on whether or not a timer interrupt
          is pending.
  
  Revision  Changes    Path
  1.12      +159 -54   src/sys/dev/aic7xxx/aic79xx.c
  1.10      +56 -18    src/sys/dev/aic7xxx/aic79xx.h
  1.11      +23 -24    src/sys/dev/aic7xxx/aic79xx.reg
  1.8       +188 -143  src/sys/dev/aic7xxx/aic79xx.seq
  1.9       +34 -28    src/sys/dev/aic7xxx/aic79xx_inline.h
  1.11      +2 -2      src/sys/dev/aic7xxx/aic79xx_osm.c
  1.10      +36 -13    src/sys/dev/aic7xxx/aic79xx_pci.c


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