cvs commit: src/sys/amd64/include _types.h src/sys/i386/include _types.h src/sys/net if_bridge.c src/sys/netinet ip_var.h src/sys/netinet6 ip6_var.h

[Poul-Henning Kamp]

In message <42C90A29.2030706 at freebsd.org>, Peter Grehan writes:
>>> FYI, any modern ppc implementation doesn't require strict alignment 
>>> for integer load/stores though there's a performance penalty for 
>>> having to split the access into smaller ones. 
>> 
>> While it's not immediately relevant to the IP code, generally speaking, 
>> is it the case that non-aligned integer reads can be non-atomic with 
>> respect to other CPUs due to the multiple access implementation?
>
>  I'd say certainly ! In fact, are there any architectures that could 
>guarantee atomicity in this case ?

Yes, the alphas "load/store conditional" could, provided that the
field is entirely inside a cache-line.

-- 
Poul-Henning Kamp       | UNIX since Zilog Zeus 3.20
phk at FreeBSD.ORG         | TCP/IP since RFC 956
FreeBSD committer       | BSD since 4.3-tahoe    
Never attribute to malice what can adequately be explained by incompetence.