test at Target mode

[Justin T. Gibbs]

>> Sorry.
>> Your design is right:target driver should reset only once.
>> After that,I read the comment about BusReset in sequencer code,and I got
>> it.
>
>This question has revived.
>Your design is logically right ,but it's not right in my condition.
>When the 2nd BusReset continues to occur, ENSELI bit in SCSISEQ is reset by
>anyone.
>Do you know who reset it?

After checking with a hardware engineer, it appears that the chip (
at least the 7899, but perhaps some of the older ones too)
automatically resets this bit on either an outgoing or incoming
bus reset.  In 6.2.0, I've chnaged the target mode reset behavior
to re-enable the interrupt immediately after we see a reset.  This
leaves us open to the "interrupt storm" problems I listed before,
but at least ensures that we will always respond to selection.  Targets
are supposed to respond to selection "as soon as possible" after a
reset, so reducing the interrupt rate by setting a timer to re-enable
select-ins every few milliseconds probably wouldn't cut it.  I'll
have to go review the SPI-4 and SAM-2 specs again.

--
Justin

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