[Bug 276690] Compilation of a particular module never ends causing runaway builds for the port graphics/diplib on arm64 architecture

https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=276690

--- Comment #13 from Dimitry Andric <dim@FreeBSD.org> ---
It's weird, I can find an upstream commit that appears to fix this hang, which
is
https://github.com/llvm/llvm-project/commit/56e60bc5bbfb8fdf2b22a897e8801c87771c84e8
("TargetLowering: fix an infinite DAG combine in SimplifySETCC ") but it
appears to have already been applied on llvm 17.0.6.

E.g. I thought I could apply that change and make it work, but now I am having
trouble reproducing the original hang. :)

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