[Bug 282138] Need system call that flushes the instruction cache for all cores

https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=282138

            Bug ID: 282138
           Summary: Need system call that flushes the instruction cache
                    for all cores
           Product: Base System
           Version: CURRENT
          Hardware: riscv
                OS: Any
            Status: New
          Severity: Affects Many People
          Priority: ---
         Component: riscv
          Assignee: riscv@FreeBSD.org
          Reporter: dapeng.gao@cl.cam.ac.uk

FreeBSD's RISC-V port lacks a system call that flushes the i-cache for all
cores. This syscall is essential for JIT to work properly. OpenBSD has
supported the system call in sysarch
(https://github.com/openbsd/src/blob/85ce0bb8dee469f412bbfb468c4393478423bbdd/sys/arch/riscv64/riscv64/machdep.c#L511)
and Linux also has it
(https://github.com/riscv-collab/riscv-gnu-toolchain/blob/8b1a7508efc8ae0f603f42e393bab5c5aec80390/linux-headers/include/asm/unistd.h#L28-L45),
which is used by the RISC-V port of Chromium
(https://github.com/CTSRD-CHERI/v8/blob/main/src/codegen/riscv/cpu-riscv.cc).

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