From nobody Sun Jun 02 13:42:19 2024 X-Original-To: freebsd-riscv@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4VsdML6qpdz5MnnY for ; Sun, 02 Jun 2024 13:42:22 +0000 (UTC) (envelope-from fuz@fuz.su) Received: from fuz.su (fuz.su [IPv6:2001:41d0:8:e508::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "fuz.su", Issuer "fuz.su" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id 4VsdMK5GPtz4291; Sun, 2 Jun 2024 13:42:21 +0000 (UTC) (envelope-from fuz@fuz.su) Authentication-Results: mx1.freebsd.org; none Received: from fuz.su (localhost [127.0.0.1]) by fuz.su (8.18.1/8.18.1) with ESMTPS id 452DgJMZ059033 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NO); Sun, 2 Jun 2024 15:42:19 +0200 (CEST) (envelope-from fuz@fuz.su) Received: (from fuz@localhost) by fuz.su (8.18.1/8.18.1/Submit) id 452DgJw7059032; Sun, 2 Jun 2024 15:42:19 +0200 (CEST) (envelope-from fuz) Date: Sun, 2 Jun 2024 15:42:19 +0200 From: Robert Clausecker To: tuexen@freebsd.org Cc: Robert Clausecker , freebsd-riscv@freebsd.org, Mitchell Horne , strajabot@gmail.com Subject: Re: Detecting the Zbb extension on riscv64 Message-ID: References: <5343E09C-017B-40B7-9349-01F1195BBB7C@freebsd.org> List-Id: FreeBSD on the RISC-V instruction set architecture List-Archive: https://lists.freebsd.org/archives/freebsd-riscv List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: freebsd-riscv@freebsd.org Sender: owner-freebsd-riscv@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <5343E09C-017B-40B7-9349-01F1195BBB7C@freebsd.org> X-Spamd-Bar: ---- X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spamd-Result: default: False [-4.00 / 15.00]; REPLY(-4.00)[]; ASN(0.00)[asn:16276, ipnet:2001:41d0::/32, country:FR] X-Rspamd-Queue-Id: 4VsdMK5GPtz4291 Hi Michael, Am Sun, Jun 02, 2024 at 03:05:09PM +0200 schrieb tuexen@freebsd.org: > > Zbb is supported by the SiFive unmatched board for example. > just double checking: > According to > https://sifive.cdn.prismic.io/sifive/d0556df9-55c6-47a8-b0f2-4b1521546543_hifive-unmatched-datasheet.pdf > the processor supports RV64GC (RV64IMAFDC). I don't see a B there. > So does it actually support Zbb? What about Zbr? The board is based on the SiFive FU740-C000 SoC, which uses a quad-core U74 CPU. Reading the [U74 Core Complex Manual], we find that it supports the Zba and Zbb instruction set extensions. [U74 Core Complex Manual]: https://starfivetech.com/uploads/u74_core_complex_manual_21G1.pdf Though on the other hand, if I actually try to execute a program using the CTZ instruction, I get a SIGILL... what's going on here? Yours, Robert Clausecker -- () ascii ribbon campaign - for an encoding-agnostic world /\ - against html email - against proprietary attachments