Re: What's the plan for powerpc64 in FreeBSD 16

----- Original Message -----
> From: "AWilcox" <AWilcox@Wilcox-Tech.com>
> To: "Timothy Pearson" <tpearson@raptorengineering.com>
> Cc: "Piotr Kubaj" <pkubaj@freebsd.org>, "Al" <al@datazap.net>, "Poul-Henning Kamp" <phk@phk.freebsd.dk>, "Minsoo Choo"
> <minsoochoo0122@proton.me>, "Warner Losh" <imp@bsdimp.com>, "freebsd-arch@freebsd.org" <arch@freebsd.org>,
> "freebsd-ppc" <freebsd-ppc@freebsd.org>
> Sent: Monday, December 1, 2025 11:47:29 AM
> Subject: Re: What's the plan for powerpc64 in FreeBSD 16

> On Dec 1, 2025, at 10:57, Timothy Pearson <tpearson@raptorengineering.com>
> wrote:
>> ABIv2 requires the use of VSX registers for argument passing.  It's possible
>> this still works at a hardware level on these devices, or that we simply
>> haven't hit the spill level where they are needed for most (all?) function
>> calls in practice.  Regardless, it's a point of concern for legacy,
>> non-OpenPOWER compliant hardware.
> 
> 
> This is not true.
> 
> Quoting the ABI itself, §2.2.3:
> 
> For the OpenPOWER ABI, the following parameters can be passed in registers:
> • Up to eight arguments can be passed in general-purpose registers r3 - r10.
> • Up to thirteen qualified floating-point arguments can be passed in
> floating-point registers f1 - f13 or up to twelve in vector registers v2 - v13.
> • Up to thirteen single-precision or double-precision decimal floating-point
> arguments can be passed in floating-point registers f1 - f13.
> • Up to six quad-precision decimal floating-point arguments can be passed in
> even-odd floating-point register pairs f2 - f13.
> • Up to 12 qualified vector arguments can be passed in v2 - v13.
> 
> If you are not using VSX-sized vector arguments, v2-v13 are not necessary.  And
> indeed, when compilers like GCC or Clang are passed -mno-vsx (implied by any
> -mcpu= lower than Power7), they won’t even reserve the optional vector register
> storage area in the stack frame.  Both usages of vector registers for parameter
> passing are specified as “can”, not “shall” or “must”.
> 
> And part of the reason that register storage area is optional is because Power
> cores may not have any vector extensions (see Microwatt, for example).  I’m
> aware that the OpenPOWER conformance suite notes that “there are no optional
> sections [of the ISA]”, however Power ISA 3.0B (the version I have handy)
> states in §1.10:
> 
>> an attempt to execute an instruction that is not provided by the implementation
>> [shall invoke the] system illegal instruction error handler
> 
> You may not be able to sell Microwatt (or Libre-SOC, or …) as “OpenPOWER ISA 3.x
> compliant”, but you can definitely run the majority of Linux and FreeBSD
> workloads on these cores without any issues.

I think where some of the practical concerns come from is that even though the specifications say "can", in practice libc and other projects don't even bother checking for the presence of the extensions; they assume ABIv2 / ppc64[le] == OpenPOWER server standard compliant hardware.  For the record, I don't agree with this approach, I'm just mentioning that's the current state of things in e.g. glibc, and thus far we've had very little traction getting this corrected.

> I am quite ready to die on the hill of VSX not being actually required by ABIv2
> in any technical capacity, and I’ve spent significant time in the bowels of
> compilers, JITs, and the like for the past 8 years proving that true.

I'll defer to your experience in this area, but at the same time is there any way I can get a detailed paper or similar on this for presentation back to the OPF?  As it stands right now, the belief in the ISA WG is that ABIv2 does require the VSX registers and the assocated move instructions, even if the actual data processing instructions are not implemented.  Until now, I had thought along the same lines.

Thank you!