[Bug 166724] if_re(4): watchdog timeout

From: <bugzilla-noreply_at_freebsd.org>
Date: Sun, 19 Jul 2026 18:51:50 UTC
https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=166724

--- Comment #143 from commit-hook@FreeBSD.org ---
A commit in branch main references this bug:

URL:
https://cgit.FreeBSD.org/src/commit/?id=d11f124e932bfa4fabdc6c5b67735181615a0630

commit d11f124e932bfa4fabdc6c5b67735181615a0630
Author:     Jérémie Jourdin <jeremie@jourdin.org>
AuthorDate: 2026-07-19 18:45:47 +0000
Commit:     Adrian Chadd <adrian@FreeBSD.org>
CommitDate: 2026-07-19 18:45:49 +0000

    re(4): recover Tx completions whose MSI was swallowed in re_intr_msi()

    A Tx completion that raises a status bit between the ISR ack at the top
    of re_intr_msi() and the IMR re-enable at the bottom is never re-signalled:
    these controllers do not re-assert MSI for an already-set status bit
    (this is why hw.re.msi_disable is a known workaround in the PR).

    Re-read ISR before re-enabling; if a Tx bit is pending, ack just that bit,
    reap the ring and restart the queue. Rx bits are deliberately left set so
    they re-arm the interrupt normally and Rx moderation state is untouched.

    Also flush the posted IMR write. Mirrors what the INTx path already
    achieves via the loop in re_intr().

    * MSI interrupt mode on RTL8168H under load; "missed Tx interrupts"
      watchdog recoveries no longer occur.

    Reviewed by:    adrian
    Differential Revision:  https://reviews.freebsd.org/D58278
    PR: kern/166724

 sys/dev/re/if_re.c | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

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