driver for OCP TAP TimeCard
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Date: Sun, 18 Jun 2023 18:14:21 UTC
Hi, I'm thinking of writing a driver for the OCP TAP TimeCard, so I'm looking for ideas on how to approach it. The card is basically a PCIe card with a Xilinx FPGA at the core. It implements a counter that is synchronised / disciplined to TAI using one or more onboard GPS modules. The oscillator is also modular and can be anything from a lowly free running temperature compensated oscillator (TCXO), to oven controlled oscillators (OCXO), Rubidium and Cesium modules that will discipline themselves to the GPS PPS signal. Apart from the counter and other related functions, it also makes four 16550 UARTs, a I2C master, quad SPI master (same as the dev/xilinx/axi_quad_spi) available. The quad SPI is to reprogram the Xilinx flash, the UARTS to access the GPS and other modules that have a UART and the I2C to access onboard sensors. They are all memory mapped inside a single bar, 64k appart. It also has MSI interrupts with a seperate vector for each function. The "standard" functions (UART, I2C and SPI) are what I am wondering about. One way to make them available is something like what the puc driver did. I also saw dev/xilinx/xlnx_pcib.c that uses ofw and fdt, that might be a way, but that seems to be more geared towards the embedded processors. So I was wondering if there are other ways that might be better. If you want to, you can read more about the card at the links below: https://github.com/opencomputeproject/Time-Appliance-Project/tree/master/Time-Card And the programming at: https://github.com/opencomputeproject/Time-Appliance-Project/tree/master/Time-Card/FPGA/Open-Source/Implementation/Xilinx/TimeCard Regards John -- John Hay