LOR dw_mmc_sim / Clock topology on MMCCAM

From: Bjoern A. Zeeb <bzeeb-lists_at_lists.zabbadoz.net>
Date: Tue, 27 May 2025 19:15:48 UTC
Hi,

this is on an MMCCAM kernel:

lock order reversal: (sleepable after non-sleepable)
  1st 0xffffa000015fa558 dw_mmc_sim (dw_mmc_sim, sleep mutex) @ /usr/src/sys/cam/cam_xpt.c:2679
  2nd 0xffff000000dcc7b0 Clock topology lock (Clock topology lock, sx) @ /usr/src/sys/dev/clk/clk.c:1208
lock order dw_mmc_sim -> Clock topology lock attempted at:
#0 0xffff0000005370c0 at witness_checkorder+0xad0
#1 0xffff0000004c8f44 at _sx_xlock+0x70
#2 0xffff000000151520 at clk_set_freq+0x50
#3 0xffff0000008a3398 at dwmmc_rockchip_update_ios+0x40
#4 0xffff000000205384 at dwmmc_set_tran_settings+0x28c
#5 0xffff000000034bcc at mmc_cam_sim_default_action+0x140
#6 0xffff000000008428 at xpt_action_default+0x1c8
#7 0xffff000000036944 at sdda_start_init_task+0xe60
#8 0xffff000000529058 at taskqueue_run_locked+0x17c
#9 0xffff000000529fdc at taskqueue_thread_loop+0xc0
#10 0xffff00000046e354 at fork_exit+0x78
#11 0xffff0000008301e8 at fork_trampoline+0x18


-- 
Bjoern A. Zeeb                                                     r15:7