[Bug 285993] nvme device breakage in 14.2 STABLE n270867-25df691800f0
Date: Thu, 17 Apr 2025 13:20:31 UTC
https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=285993 --- Comment #20 from John Baldwin <jhb@FreeBSD.org> --- (In reply to Jim Long from comment #17) In this case, the PCI-e registers start at offset 0x90: cap 10[90] = PCI-Express 2 root port max data 128(256) ARI disabled The SLOT_CAP register is at a relative offset of 0x14 from there, so can you please do: pciconf -r pcib10 0xa4 You can also perhaps try this (fine to do on top of your existing patches): diff --git a/sys/dev/pci/pci_pci.c b/sys/dev/pci/pci_pci.c index 5e71a376604b..27aea3ebd2ed 100644 --- a/sys/dev/pci/pci_pci.c +++ b/sys/dev/pci/pci_pci.c @@ -1294,9 +1294,12 @@ pcib_setup_hotplug(struct pcib_softc *sc) sc->pcie_link_sta = pcie_read_config(dev, PCIER_LINK_STA, 2); sc->pcie_slot_sta = pcie_read_config(dev, PCIER_SLOT_STA, 2); + device_printf(dev, "initial SLOT_STA %#x\n", sc->pcie_slot_sta); /* Clear any events previously pending. */ pcie_write_config(dev, PCIER_SLOT_STA, sc->pcie_slot_sta, 2); + sc->pcie_slot_sta = pcie_read_config(dev, PCIER_SLOT_STA, 2); + device_printf(dev, "cleared SLOT_STA %#x\n", sc->pcie_slot_sta); /* Enable HotPlug events. */ mask = PCIEM_SLOT_CTL_DLLSCE | PCIEM_SLOT_CTL_HPIE | The one difference here beyond the printf's is that it is explicitly discarding any pending events from POST. -- You are receiving this mail because: You are the assignee for the bug.