[Bug 275322] Improper handling of mxcsr register during debug (gdb/lldb)

From: <bugzilla-noreply_at_freebsd.org>
Date: Sat, 25 Nov 2023 03:42:00 UTC
https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=275322

            Bug ID: 275322
           Summary: Improper handling of mxcsr register during debug
                    (gdb/lldb)
           Product: Base System
           Version: 14.0-RELEASE
          Hardware: Any
                OS: Any
            Status: New
          Severity: Affects Only Me
          Priority: ---
         Component: misc
          Assignee: bugs@FreeBSD.org
          Reporter: cheyenne.wills@gmail.com
 Attachment #246554 text/plain
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Created attachment 246554
  --> https://bugs.freebsd.org/bugzilla/attachment.cgi?id=246554&action=edit
C code to demonstrate the problem

There is improper handling of the mxcsr register when debugging.  It appears
that the current mxcsr register is not being given to the debugger.

The attached program illustrates the problem.

compile the attached program:lang -mfpmath=sse -mlong-double-64 -g -lm -o {x}
{x.c}

Run the following debug session:

gdb ./{x}
break main
run
** program should run to end with the following output:

ra=7.01209994486364354e-310 reatt=10000000000 ra * reatt-> result =0 savemxcsr
00001f80 mxcsr_set 00009fc0 showmxcsr 00009fc0 mxcsr 00001f80

disassemble main
** set a break at the mulsd instruction (should be around offset +81)
run
** should now be at the mulsd instruction
continue
** output should be the same as above

run
** should now be at the mulsd instruction
info register mxcsr
** output should be:
mxcsr          0x1f80              [ IM DM ZM OM UM PM ]
** which is incorrect since it there was a ldmxcsr instruction around offset
+39 and the result should be:
mxcsr          0x9fc0              [ DAZ IM DM ZM OM UM PM FZ ]

continue
** output shows incorrect output:
ra=7.01209994486364354e-310 reatt=10000000000 ra * reatt-> result
=7.01209994486364403e-300 savemxcsr 00001f80 mxcsr_set 00009fc0 showmxcsr
00009fc0 mxcsr 00001fa2
** since it appears that the mxcsr register is being reset back to the 0x1f80
value after it was displayed

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