[Bug 265974] SMR has several missing barriers

From: <bugzilla-noreply_at_freebsd.org>
Date: Sun, 28 Aug 2022 23:01:33 UTC

--- Comment #10 from Mark Johnston <markj@FreeBSD.org> ---
(In reply to Pierre Habouzit from comment #9)
dmb st only orders stores, but that's not sufficient to implement a release
fence.  For what it's worth, LLVM on FreeBSD 14/arm64 compiles
atomic_thread_fence(memory_order_release) to a "dmb ish", same as

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