[Bug 265974] SMR has several missing barriers

https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=265974

--- Comment #3 from Konstantin Belousov <kib@FreeBSD.org> ---
I believe you are right, but I would wait for an opinion of people who
spent a time with smr code.

That said, atomic_add_acq on x86 has the sequentially consistent semantic
already (which is why you said that it works on Intel, right?).  So the
#ifdef from the patch in smr_enter() is not needed, use seq_cst fence
for all arches.

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