[Bug 265974] SMR has several missing barriers

From: <bugzilla-noreply_at_freebsd.org>
Date: Fri, 26 Aug 2022 05:57:37 UTC

--- Comment #3 from Konstantin Belousov <kib@FreeBSD.org> ---
I believe you are right, but I would wait for an opinion of people who
spent a time with smr code.

That said, atomic_add_acq on x86 has the sequentially consistent semantic
already (which is why you said that it works on Intel, right?).  So the
#ifdef from the patch in smr_enter() is not needed, use seq_cst fence
for all arches.

You are receiving this mail because:
You are the assignee for the bug.