[Bug 256264] Devices behind PEX 8664 PCIe Switch not detected since 11.0-RELEASE

https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=256264

John Baldwin <jhb@FreeBSD.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |jhb@FreeBSD.org,
                   |                            |vangyzen@FreeBSD.org

--- Comment #4 from John Baldwin <jhb@FreeBSD.org> ---
I think the switch is claiming to support hot plug but then claiming that no
child devices are present.  In particular:

                SltCap: AttnBtn+ PwrCtrl+ MRL+ AttnInd+ PwrInd+ HotPlug+
Surprise-
                        Slot #240, PowerLimit 25.000W; Interlock- NoCompl-
                SltCtl: Enable: AttnBtn+ PwrFlt+ MRL+ PresDet+ CmdCplt+ HPIrq+
LinkChg+
                        Control: AttnInd Off, PwrInd Off, Power+ Interlock-
                SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet-
Interlock-
                        Changed: MRL- PresDet- LinkState-

Notice HotPlug+ in SltCap, but PresDet- (presence detect) in SltSta.  Probably
these slots aren't really hot plug and your motherboard failed to write up the
pins correctly for this switch to wire PD as always set.  You can try setting
'hw.pci.enable_pcie_hp=0' in loader.conf or at the loader prompt as a
workaround to test that theory.

We already have one quirk to ignore the MRL if the DataLink Layer is active. 
We could similarly perhaps ignore HotPlug if the DataLink Layer is active bit
PD is clear.

If the tunable works, then this patch might work as a quirk:

diff --git a/sys/dev/pci/pci_pci.c b/sys/dev/pci/pci_pci.c
index 2b86f2f50e11..5674bcd69fa7 100644
--- a/sys/dev/pci/pci_pci.c
+++ b/sys/dev/pci/pci_pci.c
@@ -967,21 +967,22 @@ pcib_probe_hotplug(struct pcib_softc *sc)
                return;

        /*
-        * Some devices report that they have an MRL when they actually
-        * do not.  Since they always report that the MRL is open, child
-        * devices would be ignored.  Try to detect these devices and
-        * ignore their claim of HotPlug support.
-        *
-        * If there is an open MRL but the Data Link Layer is active,
-        * the MRL is not real.
+        * Some bridges use HotPlug-capable chips but are not really
+        * HotPlug bridges.  The bridges can advertise inconsistent
+        * statuses such as cards not being present or an MRL that is
+        * always open, but the Data Link Layer is active.  Ignore
+        * HotPlug on such bridges.
         */
-       if ((sc->pcie_slot_cap & PCIEM_SLOT_CAP_MRLSP) != 0) {
-               link_sta = pcie_read_config(dev, PCIER_LINK_STA, 2);
+       link_sta = pcie_read_config(dev, PCIER_LINK_STA, 2);
+       if ((link_sta & PCIEM_LINK_STA_DL_ACTIVE) != 0) {
                slot_sta = pcie_read_config(dev, PCIER_SLOT_STA, 2);
-               if ((slot_sta & PCIEM_SLOT_STA_MRLSS) != 0 &&
-                   (link_sta & PCIEM_LINK_STA_DL_ACTIVE) != 0) {
+
+               if ((slot_sta & PCIEM_SLOT_STA_PDS) == 0)
+                       return;
+
+               if ((sc->pcie_slot_cap & PCIEM_SLOT_CAP_MRLSP) != 0 &&
+                   (slot_sta & PCIEM_SLOT_STA_MRLSS) != 0)
                        return;
-               }
        }

        /*

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