Date: Sat, 18 Sep 2021 17:32:56 UTC
https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=258580 Bug ID: 258580 Summary: vte(4): restore MDC clock speed register value after MAC reset Product: Base System Version: CURRENT Hardware: i386 OS: Any Status: New Severity: Affects Some People Priority: --- Component: kern Assignee: bugs@FreeBSD.org Reporter: email@example.com Created attachment 227988 --> https://bugs.freebsd.org/bugzilla/attachment.cgi?id=227988&action=edit if_vte.c patch Hi, On some Vortex86 SoCs MDC speed control register needs to be restored to original value after MAC reset. This issue happens if MAC has non default VTE_MDCSC register value before reset, and it is erroneously set to default after, thus causing certain PHY registers fail to be read. Since PHY registers determine link status, the link is never established (ifconfig media shows "none" value). Also, one obvious sign is incorrect (not RDC) oui value in dmesg. Initially, I found and fixed that in NetBSD, but it affects all BSDs and Linux. Patch is already applied on NetBSD (http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/pci/if_vte.c.diff?r1=1.31&r2=1.32) and Linux (https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git/commit/?id=e3f0cc1a945fcefec0c7c9d9dfd028a51daa1846). Sending exactly the same patch for FreeBSD. For more info and my debugging history can be found in http://gnats.netbsd.org/cgi-bin/query-pr-single.pl?number=53494 thread. I tested the patch on my affected Vortex86DX3 based system (link is established/oui is correct), and unaffected DX2, EX2 based machines on FreeBSD (the patch itself was tested by few more people in NetBSD/Linux too). -- You are receiving this mail because: You are the assignee for the bug.