Re: PCF8574 I2C configuration for 14.0-CURRENT on a RPi2B
- In reply to: Mark Millard : "Re: PCF8574 I2C configuration for 14.0-CURRENT on a RPi2B"
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Date: Mon, 07 Mar 2022 14:48:15 UTC
Attempt number four to answer Mark's question in regards to the origin
of config.txt content. (The em control character spewed out by "man"
mangled my mail earlier.)
Mark wrote:
> Don wrote:
>>
>> and /boot/msdos/config.txt looks like this:
>>
>> root@generic:/boot # cat /boot/msdos/config.txt
>> init_uart_clock=3000000
>> enable_uart=1
>> kernel=u-boot.bin
>> kernel7=u-boot.bin
>> dtoverlay=mmc
>
> config.txt seems fine up to here. But I've never seen
> anything indicating that the following notation is
> valid for config.txt files:
>
>> / {
>> gpioiic0 {
>> compatible = "i2c-gpio";
>> pinctrl-names = "default";
>> pinctrl-0 = <&pinctrl_gpioiic0>;
>> scl-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
>> sda-gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
>> status = "okay";
>> };
>> };
>
> If you have a reference indicating otherwise, I'd
> be interested to know what it is.
# man gpioicc
------------------------------------------------------------------------
GPIOIIC(4) FreeBSD Kernel Interfaces Manual GPIOIIC(4)
NAME
gpioiic - GPIO I2C bit-banging device driver
SYNOPSIS
To compile this driver into the kernel, place the following lines in your
kernel configuration file:
device gpio
device gpioiic
device iicbb
device iicbus
Alternatively, to load the driver as a module at boot time, place the
following line in loader.conf(5):
gpioiic_load="YES"
DESCRIPTION
The gpioiic driver provides an IIC bit-banging interface using two GPIO
pins for the SCL and SDA lines on the bus.
gpioiic simulates an open collector kind of output when managing the pins
on the bus, even on systems which don't directly support configuring gpio
pins in that mode. The pins are never driven to the logical value of
'1'. They are driven to '0' or switched to input mode (Hi-Z/tri-state),
and an external pullup resistor pulls the line to the 1 state unless some
other device on the bus is driving it to 0.
HINTS CONFIGURATION
<snipped>
FDT CONFIGURATION
On an FDT(4) based system, such as ARM, the DTS node for gpioiic conforms
to the standard bindings document i2c/i2c-gpio.yaml. The device node
typically appears at the root of the device tree. The following is an
example of a gpioiic node with one slave device on the IIC bus:
/ {
gpioiic0 {
compatible = "i2c-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpioiic0>;
scl-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
status = "okay";
/* One slave device on the i2c bus. */
rtc@51 {
compatible="nxp,pcf2127";
reg = <0x51>;
status = "okay";
};
};
};
Where:
compatible Should be set to "i2c-gpio". The deprecated string
"gpioiic" is also accepted for backwards compatibility.
scl-gpios sda-gpios
These properties indicate which GPIO pins should be used
for clock and data on the GPIO IIC bit-banging bus.
There is no requirement that the two pins belong to the
same gpio controller.
pinctrl-names pinctrl-0
These properties may be required to configure the chosen
pins as gpio pins, unless the pins default to that state
on your system.
SEE ALSO
fdt(4), gpio(4), iic(4), iicbb(4), iicbus(4)
------------------------------------------------------------------------
I'll take a closer look at "man dtc" and "i2c/i2c-gpio.yaml"
https://mjmwired.net/kernel/Documentation/devicetree/bindings/i2c/i2c-gpio.yaml
Other replies in the thread provide me with additional food for thought
for the time being.
Danke,
--
Don, KB7RPU, https://www.qsl.net/kb7rpu
There was a young lady named Bright Whose speed was far faster than light;
She set out one day In a relative way And returned on the previous night.