From nobody Fri Oct 09 10:12:30 2026 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4j1N2k4JVsz6vRP2 for ; Fri, 09 Oct 2026 10:12:30 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "YR2" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id 4j1N2k3Jhkz4Xg0 for ; Fri, 09 Oct 2026 10:12:30 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1791540750; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=rbr5yGSaWr1zU2Z61YB/rkCtzl61a9FYWikSRr6TFaI=; b=Ta8tGJPs11ez0a4SqgJuzjBaY5caWfKBe2QG88HueAYT+Rs7x+z9nTMvBBc+uztXCeG8fr KPCRFB0c3gg3K+boLOV6QRkWJ8ZeyR8t6wOSAP0OlPy6H0NGVx0XuCA+0EZnBsBfR+Ybmq T5oZoSTpABx3/sB1hGRW7wxesCQ752u0RJkFuKvJAFecoUkBIil4pMsQKGm1cI7u0xxSwG ivMPbtpcZbBWw9uhPhqiaGXD9K75G6etumuhhszmeXEBOQeOBgcojBuAL6mD22A7qA10n5 BljcfVNsBuI+sHlyCCZwVDVNc7iGYZWV+RhVRfffSQlh/xqXSmoSxg3zPNwB6Q== ARC-Seal: i=1; a=rsa-sha256; d=freebsd.org; s=dkim; cv=none; t=1791540750; b=gKa14tPZO/V8ptazO/ncGpTKKFQlVefq8xOlum8NF3CTDOD59DU/TVmkCH2/ACZEMTrv3Q fxCWECUc36PFGzaznCqv0B7sBC1+8Gzv0VecevaCqXs7Cz8DE1PyWb/+gXwGPbnwzcHzao sfUVY+IsQ8YnLbbm1dDRqrUcQQE8x1GCrdPAqVpq3L4jRggx6G/C3DsQpTLYTDYCZmeMHw ZQ+3jAFBKefoCE/fq64pSaEU/XnLgHTBEBo6OBZaSzX8AEwpb+Hkr5fgoJO9V77ZBnAuBK BiT24T3b7Wx3Dz2HybDI38M7p/IR+BrTLna3TJrAjP+uvO4hQ7atgpj9P8zVRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1791540750; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=rbr5yGSaWr1zU2Z61YB/rkCtzl61a9FYWikSRr6TFaI=; b=S50/gSoVotT3MGtWIgzrZtLCLadYqmd3ILlaFIrWxhmrgES0eUvPuc3wkl8YZXsj617kpx xaBeEzuAThTCeVJf5tArVYyBRCYANnE57r8avxyWuu2rgPguS7Lbel2s0F6uUrRpwQ7U0x 53s7EK/IJfyYz5c4Ym4wsW9BMBB6I8IKilV6ZCWAbc4C+pa9WVMqo/yrsgVmcVJAclz8oa NEGsyfGkRGANhOupnV7z9YoerH6sivqWK/lX7p1P9aqJGlw7s1zaB16d80xPfCrKou99Mv wFGWTW+IjyCF1q8jdG6t1Q40oC/Is+m91o7Y6+X3qul1fx0ezbI9LtsyLsatRw== ARC-Authentication-Results: i=1; mx1.freebsd.org; none Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4j1N2k2MMwz1LZF for ; Fri, 09 Oct 2026 10:12:30 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 41b37 by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Fri, 09 Oct 2026 10:12:30 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Cc: Sumit Saxena From: Sumit Saxena Subject: git: 9ff4cca75c72 - main - if_bnxt: consolidate readl_fbsd/writel_fbsd and fix BAR mapping List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-main@freebsd.org Sender: owner-dev-commits-src-main@FreeBSD.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: ssaxena X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 9ff4cca75c727a5b65f279fe4bc66e71abb305a1 Auto-Submitted: auto-generated Date: Fri, 09 Oct 2026 10:12:30 +0000 Message-Id: <6ac8be0e.41b37.7f03b072@gitrepo.freebsd.org> The branch main has been updated by ssaxena: URL: https://cgit.FreeBSD.org/src/commit/?id=9ff4cca75c727a5b65f279fe4bc66e71abb305a1 commit 9ff4cca75c727a5b65f279fe4bc66e71abb305a1 Author: Sumit Saxena AuthorDate: 2026-08-18 16:49:36 +0000 Commit: Sumit Saxena CommitDate: 2026-10-09 08:24:42 +0000 if_bnxt: consolidate readl_fbsd/writel_fbsd and fix BAR mapping There are multiple duplicates of readl_fbsd and writel_fbsd spread accross bnxt_en and bnxt_re drivers. Move a single definition into bnxt.h as static inline, shared by bnxt_en and bnxt_re, using the correctly sized bus_space_read_4()/bus_space_write_4() accessors, and drop the other two copies along with their declarations. Also, Fix the BAR selection while at it: bar_idx 0 addresses BAR0 (the HWRM bar) and bar_idx 2 addresses BAR2 (the doorbell bar), matching every call site (e.g. BNXT_FW_HEALTH_REG_TYPE_BAR0/BAR1 in if_bnxt.c) and bnxt_pci_mapping()'s own bnxt_map_bar() calls, but both old copies and bnxt.h's own inline had the two bars swapped. Add BNXT_HWRM_BAR_IDX/BNXT_DOORBELL_BAR_IDX macros for the two valid bar_idx values and use them at every readl_fbsd()/writel_fbsd() call site plus bnxt_pci_mapping(), instead of bare 0/2 literals. Any other bar_idx is a programming error, so readl_fbsd()/writel_fbsd() panic on it rather than silently guessing a BAR. Reviewed by: gallatin MFC after: 2 weeks Sponsored by: Broadcom Inc. Differential Revision: https://reviews.freebsd.org/D58995 --- sys/dev/bnxt/bnxt_en/bnxt.h | 36 +++++++++++++++++++++++++++++++ sys/dev/bnxt/bnxt_en/if_bnxt.c | 39 +++++++++------------------------- sys/dev/bnxt/bnxt_re/bnxt_re.h | 2 -- sys/dev/bnxt/bnxt_re/main.c | 48 +++++++++++++++++------------------------- sys/dev/bnxt/bnxt_re/stats.c | 3 ++- 5 files changed, 67 insertions(+), 61 deletions(-) diff --git a/sys/dev/bnxt/bnxt_en/bnxt.h b/sys/dev/bnxt/bnxt_en/bnxt.h index d4167301ffff..34afad28377d 100644 --- a/sys/dev/bnxt/bnxt_en/bnxt.h +++ b/sys/dev/bnxt/bnxt_en/bnxt.h @@ -33,6 +33,7 @@ #include #include #include +#include #include #include @@ -394,6 +395,9 @@ struct bnxt_bar_info { int rid; }; +#define BNXT_HWRM_BAR_IDX 0 +#define BNXT_DOORBELL_BAR_IDX 2 + struct bnxt_flow_ctrl { bool rx; bool tx; @@ -1476,4 +1480,36 @@ int bnxt_alloc_ctx_pg_tbls(struct bnxt_softc *softc, struct bnxt_ctx_pg_info *ctx_pg, uint32_t mem_size, uint8_t depth, struct bnxt_ctx_mem_type *ctxm); + +static inline u32 +readl_fbsd(struct bnxt_softc *bp, u32 reg_off, u8 bar_idx) +{ + switch (bar_idx) { + case BNXT_HWRM_BAR_IDX: + return (bus_space_read_4(bp->hwrm_bar.tag, + bp->hwrm_bar.handle, reg_off)); + case BNXT_DOORBELL_BAR_IDX: + return (bus_space_read_4(bp->doorbell_bar.tag, + bp->doorbell_bar.handle, reg_off)); + default: + panic("%s: invalid bar_idx %u", __func__, bar_idx); + } +} + +static inline void +writel_fbsd(struct bnxt_softc *bp, u32 reg_off, u8 bar_idx, u32 val) +{ + switch (bar_idx) { + case BNXT_HWRM_BAR_IDX: + bus_space_write_4(bp->hwrm_bar.tag, bp->hwrm_bar.handle, + reg_off, htole32(val)); + break; + case BNXT_DOORBELL_BAR_IDX: + bus_space_write_4(bp->doorbell_bar.tag, bp->doorbell_bar.handle, + reg_off, htole32(val)); + break; + default: + panic("%s: invalid bar_idx %u", __func__, bar_idx); + } +} #endif /* _BNXT_H */ diff --git a/sys/dev/bnxt/bnxt_en/if_bnxt.c b/sys/dev/bnxt/bnxt_en/if_bnxt.c index deb5a62347bd..205d98585a1e 100644 --- a/sys/dev/bnxt/bnxt_en/if_bnxt.c +++ b/sys/dev/bnxt/bnxt_en/if_bnxt.c @@ -312,27 +312,6 @@ MODULE_VERSION(if_bnxt, 1); IFLIB_PNP_INFO(pci, bnxt, bnxt_vendor_info_array); -void writel_fbsd(struct bnxt_softc *bp, u32, u8, u32); -u32 readl_fbsd(struct bnxt_softc *bp, u32, u8); - -u32 readl_fbsd(struct bnxt_softc *bp, u32 reg_off, u8 bar_idx) -{ - - if (!bar_idx) - return bus_space_read_4(bp->doorbell_bar.tag, bp->doorbell_bar.handle, reg_off); - else - return bus_space_read_4(bp->hwrm_bar.tag, bp->hwrm_bar.handle, reg_off); -} - -void writel_fbsd(struct bnxt_softc *bp, u32 reg_off, u8 bar_idx, u32 val) -{ - - if (!bar_idx) - bus_space_write_4(bp->doorbell_bar.tag, bp->doorbell_bar.handle, reg_off, htole32(val)); - else - bus_space_write_4(bp->hwrm_bar.tag, bp->hwrm_bar.handle, reg_off, htole32(val)); -} - static DEFINE_IDA(bnxt_aux_dev_ids); static device_method_t bnxt_iflib_methods[] = { @@ -1881,10 +1860,10 @@ static u32 bnxt_fw_health_readl(struct bnxt_softc *bp, int reg_idx) reg_off = fw_health->mapped_regs[reg_idx]; fallthrough; case BNXT_FW_HEALTH_REG_TYPE_BAR0: - val = readl_fbsd(bp, reg_off, 0); + val = readl_fbsd(bp, reg_off, BNXT_HWRM_BAR_IDX); break; case BNXT_FW_HEALTH_REG_TYPE_BAR1: - val = readl_fbsd(bp, reg_off, 2); + val = readl_fbsd(bp, reg_off, BNXT_DOORBELL_BAR_IDX); break; } if (reg_idx == BNXT_FW_RESET_INPROG_REG) @@ -2002,14 +1981,15 @@ static void bnxt_fw_reset_writel(struct bnxt_softc *bp, int reg_idx) pci_write_config_dword(bp->pdev, reg_off, val); break; case BNXT_FW_HEALTH_REG_TYPE_GRC: - writel_fbsd(bp, BNXT_GRCPF_REG_WINDOW_BASE_OUT + 4, 0, reg_off & BNXT_GRC_BASE_MASK); + writel_fbsd(bp, BNXT_GRCPF_REG_WINDOW_BASE_OUT + 4, BNXT_HWRM_BAR_IDX, + reg_off & BNXT_GRC_BASE_MASK); reg_off = (reg_off & BNXT_GRC_OFFSET_MASK) + 0x2000; fallthrough; case BNXT_FW_HEALTH_REG_TYPE_BAR0: - writel_fbsd(bp, reg_off, 0, val); + writel_fbsd(bp, reg_off, BNXT_HWRM_BAR_IDX, val); break; case BNXT_FW_HEALTH_REG_TYPE_BAR1: - writel_fbsd(bp, reg_off, 2, val); + writel_fbsd(bp, reg_off, BNXT_DOORBELL_BAR_IDX, val); break; } if (delay_msecs) { @@ -2080,7 +2060,8 @@ static int bnxt_alloc_fw_health(struct bnxt_softc *bp) static inline void __bnxt_map_fw_health_reg(struct bnxt_softc *bp, u32 reg) { - writel_fbsd(bp, BNXT_GRCPF_REG_WINDOW_BASE_OUT + BNXT_FW_HEALTH_WIN_MAP_OFF, 0, reg & BNXT_GRC_BASE_MASK); + writel_fbsd(bp, BNXT_GRCPF_REG_WINDOW_BASE_OUT + BNXT_FW_HEALTH_WIN_MAP_OFF, + BNXT_HWRM_BAR_IDX, reg & BNXT_GRC_BASE_MASK); } static int bnxt_map_fw_health_regs(struct bnxt_softc *bp) @@ -5041,11 +5022,11 @@ bnxt_pci_mapping(struct bnxt_softc *softc) { int rc; - rc = bnxt_map_bar(softc, &softc->hwrm_bar, 0, true); + rc = bnxt_map_bar(softc, &softc->hwrm_bar, BNXT_HWRM_BAR_IDX, true); if (rc) return rc; - rc = bnxt_map_bar(softc, &softc->doorbell_bar, 2, false); + rc = bnxt_map_bar(softc, &softc->doorbell_bar, BNXT_DOORBELL_BAR_IDX, false); return rc; } diff --git a/sys/dev/bnxt/bnxt_re/bnxt_re.h b/sys/dev/bnxt/bnxt_re/bnxt_re.h index 60ff33c1a802..f1457b45a362 100644 --- a/sys/dev/bnxt/bnxt_re/bnxt_re.h +++ b/sys/dev/bnxt/bnxt_re/bnxt_re.h @@ -1035,8 +1035,6 @@ int bnxt_re_set_dbq_throttling_reg(struct bnxt_re_dev *rdev, void bnxt_re_pacing_alert(struct bnxt_re_dev *rdev); int bnxt_re_hwrm_pri2cos_qcfg(struct bnxt_re_dev *rdev, struct bnxt_re_tc_rec *tc_rec, u16 target_id); -void writel_fbsd(struct bnxt_softc *bp, u32, u8, u32); -u32 readl_fbsd(struct bnxt_softc *bp, u32, u8); static inline unsigned int bnxt_re_get_total_mr_mw_count(struct bnxt_re_dev *rdev) { diff --git a/sys/dev/bnxt/bnxt_re/main.c b/sys/dev/bnxt/bnxt_re/main.c index 295125218d03..8e8dca0b9441 100644 --- a/sys/dev/bnxt/bnxt_re/main.c +++ b/sys/dev/bnxt/bnxt_re/main.c @@ -115,8 +115,6 @@ static int bnxt_re_ib_init(struct bnxt_re_dev *rdev); static void bnxt_re_ib_init_2(struct bnxt_re_dev *rdev); void _bnxt_re_remove(struct auxiliary_device *adev); -void writel_fbsd(struct bnxt_softc *bp, u32, u8, u32); -u32 readl_fbsd(struct bnxt_softc *bp, u32, u8); static int bnxt_re_hwrm_dbr_pacing_qcfg(struct bnxt_re_dev *rdev); int bnxt_re_register_netdevice_notifier(struct notifier_block *nb) @@ -138,23 +136,6 @@ void bnxt_re_set_dma_device(struct ib_device *ibdev, struct bnxt_re_dev *rdev) ibdev->dma_device = &rdev->en_dev->pdev->dev; } -u32 readl_fbsd(struct bnxt_softc *bp, u32 reg_off, u8 bar_idx) -{ - - if (bar_idx) - return bus_space_read_8(bp->doorbell_bar.tag, bp->doorbell_bar.handle, reg_off); - else - return bus_space_read_8(bp->hwrm_bar.tag, bp->hwrm_bar.handle, reg_off); -} - -void writel_fbsd(struct bnxt_softc *bp, u32 reg_off, u8 bar_idx, u32 val) -{ - if (bar_idx) - bus_space_write_8(bp->doorbell_bar.tag, bp->doorbell_bar.handle, reg_off, htole32(val)); - else - bus_space_write_8(bp->hwrm_bar.tag, bp->hwrm_bar.handle, reg_off, htole32(val)); -} - static void bnxt_re_update_fifo_occup_slabs(struct bnxt_re_dev *rdev, u32 fifo_occup) { @@ -529,7 +510,8 @@ static void __wait_for_fifo_occupancy_below_th(struct bnxt_re_dev *rdev) * below pacing algo threshold as soon as pacing kicks in. */ while (1) { - read_val = readl_fbsd(rdev->en_dev->softc, rdev->dbr_db_fifo_reg_off, 0); + read_val = readl_fbsd(rdev->en_dev->softc, rdev->dbr_db_fifo_reg_off, + BNXT_HWRM_BAR_IDX); fifo_occup = pacing_data->fifo_max_depth - ((read_val & pacing_data->fifo_room_mask) >> pacing_data->fifo_room_shift); @@ -567,7 +549,8 @@ static bool bnxt_re_check_if_dbq_intr_triggered(struct bnxt_re_dev *rdev) int j; for (j = 0; j < 10; j++) { - read_val = readl_fbsd(rdev->en_dev->softc, rdev->dbr_aeq_arm_reg_off, 0); + read_val = readl_fbsd(rdev->en_dev->softc, rdev->dbr_aeq_arm_reg_off, + BNXT_HWRM_BAR_IDX); dev_dbg(rdev_to_dev(rdev), "AEQ ARM status = 0x%x\n", read_val); if (!read_val) @@ -587,8 +570,10 @@ int bnxt_re_set_dbq_throttling_reg(struct bnxt_re_dev *rdev, u16 nq_id, u32 thro if (bnxt_qplib_dbr_pacing_ext_en(rdev->chip_ctx)) { cag_ring_water_mark = (nq_id & CAG_RING_MASK) << CAG_RING_SHIFT | (throttle_val & WATERMARK_MASK); - writel_fbsd(rdev->en_dev->softc, rdev->dbr_throttling_reg_off, 0, cag_ring_water_mark); - read_val = readl_fbsd(rdev->en_dev->softc , rdev->dbr_throttling_reg_off, 0); + writel_fbsd(rdev->en_dev->softc, rdev->dbr_throttling_reg_off, + BNXT_HWRM_BAR_IDX, cag_ring_water_mark); + read_val = readl_fbsd(rdev->en_dev->softc, rdev->dbr_throttling_reg_off, + BNXT_HWRM_BAR_IDX); dev_dbg(rdev_to_dev(rdev), "%s: dbr_throttling_reg_off read_val = 0x%x\n", __func__, read_val); @@ -599,7 +584,7 @@ int bnxt_re_set_dbq_throttling_reg(struct bnxt_re_dev *rdev, u16 nq_id, u32 thro return 1; } } - writel_fbsd(rdev->en_dev->softc, rdev->dbr_aeq_arm_reg_off, 0, 1); + writel_fbsd(rdev->en_dev->softc, rdev->dbr_aeq_arm_reg_off, BNXT_HWRM_BAR_IDX, 1); return 0; } @@ -644,7 +629,8 @@ static void bnxt_re_handle_dbr_nq_pacing_notification(struct bnxt_re_dev *rdev) return; } /*Configure GRC access for Throttling and aeq_arm register */ - writel_fbsd(rdev->en_dev->softc, BNXT_GRCPF_REG_WINDOW_BASE_OUT + 28, 0, + writel_fbsd(rdev->en_dev->softc, BNXT_GRCPF_REG_WINDOW_BASE_OUT + 28, + BNXT_HWRM_BAR_IDX, rdev->chip_ctx->dbr_aeq_arm_reg & BNXT_GRC_BASE_MASK); rdev->dbr_throttling_reg_off = @@ -848,7 +834,8 @@ static void bnxt_re_pacing_timer_exp(struct work_struct *work) return; pacing_data = rdev->qplib_res.pacing_data; - read_val = readl_fbsd(rdev->en_dev->softc , rdev->dbr_db_fifo_reg_off, 0); + read_val = readl_fbsd(rdev->en_dev->softc, rdev->dbr_db_fifo_reg_off, + BNXT_HWRM_BAR_IDX); fifo_occup = pacing_data->fifo_max_depth - ((read_val & pacing_data->fifo_room_mask) >> pacing_data->fifo_room_shift); @@ -3394,7 +3381,8 @@ static int bnxt_re_initialize_dbr_pacing(struct bnxt_re_dev *rdev) goto fail; } /* MAP grc window 2 for reading db fifo depth */ - writel_fbsd(rdev->en_dev->softc, BNXT_GRCPF_REG_WINDOW_BASE_OUT + 4, 0, + writel_fbsd(rdev->en_dev->softc, BNXT_GRCPF_REG_WINDOW_BASE_OUT + 4, + BNXT_HWRM_BAR_IDX, rdev->chip_ctx->dbr_stat_db_fifo & BNXT_GRC_BASE_MASK); rdev->dbr_db_fifo_reg_off = (rdev->chip_ctx->dbr_stat_db_fifo & BNXT_GRC_OFFSET_MASK) + @@ -3460,12 +3448,14 @@ int bnxt_re_enable_dbr_pacing(struct bnxt_re_dev *rdev) return -EIO; } /* MAP grc window 8 for ARMing the NQ DBQ */ - writel_fbsd(rdev->en_dev->softc, BNXT_GRCPF_REG_WINDOW_BASE_OUT + 28 , 0, + writel_fbsd(rdev->en_dev->softc, BNXT_GRCPF_REG_WINDOW_BASE_OUT + 28, + BNXT_HWRM_BAR_IDX, rdev->chip_ctx->dbr_aeq_arm_reg & BNXT_GRC_BASE_MASK); rdev->dbr_aeq_arm_reg_off = (rdev->chip_ctx->dbr_aeq_arm_reg & BNXT_GRC_OFFSET_MASK) + 0x8000; - writel_fbsd(rdev->en_dev->softc, rdev->dbr_aeq_arm_reg_off , 0, 1); + writel_fbsd(rdev->en_dev->softc, rdev->dbr_aeq_arm_reg_off, + BNXT_HWRM_BAR_IDX, 1); } return 0; diff --git a/sys/dev/bnxt/bnxt_re/stats.c b/sys/dev/bnxt/bnxt_re/stats.c index 7b0e6097aae6..e0e9749d9253 100644 --- a/sys/dev/bnxt/bnxt_re/stats.c +++ b/sys/dev/bnxt/bnxt_re/stats.c @@ -611,7 +611,8 @@ static void bnxt_re_copy_db_pacing_stats(struct bnxt_re_dev *rdev, stats->value[BNXT_RE_DBQ_PACING_CMPL] = dbr_sw_stats->dbq_pacing_complete; stats->value[BNXT_RE_DBQ_PACING_ALERT] = dbr_sw_stats->dbq_pacing_alerts; stats->value[BNXT_RE_DBQ_DBR_FIFO_REG] = readl_fbsd(rdev->en_dev->softc, - rdev->dbr_db_fifo_reg_off, 0); + rdev->dbr_db_fifo_reg_off, + BNXT_HWRM_BAR_IDX); } int bnxt_re_get_hw_stats(struct ib_device *ibdev,