From nobody Mon Nov 02 16:27:15 2026 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4jJHD86rdpz6xx9l for ; Mon, 02 Nov 2026 16:27:20 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 4jJHD85kBVz4kQ7 for ; Mon, 02 Nov 2026 16:27:20 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1793636840; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=mW4zCKL0m/wizBvbXqtD+P2wF9RfAeSlL9Nas6lpYlY=; b=CHFJ4wjCDC1Hy5r/ktueKE42jrAkz3oBfVgxNtWW+Zr6b6DvuEqbFaa+RbcUsrRhSE0pLa EmeWe9Bl8MFLCzZxfQ6Nlw8VbGtpyp/W1S4m9iMEMyCUEGXHVnIA1bLYFN7nTdTe6Fr49b pJid9P+UuLH1tD/6VGV+anQ27Sp0edZviFcN/n0WhAjPflrWco8VmD6cqzgnLUrYMTm/Dd zUGUnROaI+SxzJ4rR7lUkLPToNCVlo447v8/qaUms98c4MbwuvP8z72FIkJfBJnfgBKwJY zfUNp2brTRZzx60PepCvVA6PFK7M2tAXs/aF9SEO2AOCYskzYrJlktDiGFESXA== ARC-Seal: i=1; a=rsa-sha256; d=freebsd.org; s=dkim; cv=none; t=1793636840; b=sbHuTn4LRdTmNo3YgZN9NtFcweaRegFHAAejpREOA8JUnvyfWiC5wi4U2OPaCAR3fPixCG TuoYTBKyHtcFfc+emEOeDJneWCaBYiehQE4Au+KdD0HGhQehqAdUZduoJgLcD2BRhl1kpc iW4p82AKEHdO3s/4/VN9Fp7sDuY70/mTAaegTX9vjzlUt24CYEew3s3ahqlvLuan166IYf T0aLPE7Wf2N5rIqGBNqZRKa6SfTUnLj/QIzMPOnkg9J9NRp7lOCgx91z/rXkNKysUoWoLU I9BWe7snUUtnB27Fbr1sq9BsJCcCwELG6JqXCIm0Z3PHK+IPPtpScuyuazUjzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1793636840; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=mW4zCKL0m/wizBvbXqtD+P2wF9RfAeSlL9Nas6lpYlY=; b=BKoEuq4PyAdGQZB7J60Cx2e0+H+2qaB3xgdnhdyuHKMTDwVh83Nxj8MzzmsXsf7lLNDTWQ yvZCPTdkmKFAWDE610ahyfGkCTNNHGweRTiwg8/Tg2aFQqLzVFtaYYserLAXmbKLiSV3Zv tWJdlA6CrQupMlju5fU+amm4KN9eP0Eir9s9Vsn1hXc3V6d4A8xpif6TSMdUhiSbMN1Tcv eoCrRSX8LtO4JRhQ7lFKJn8So50MI/2N9hz/aRuwpVko62fFicva/7j/lc/Fa6toHwvOe9 M7vFrXjBw6pfVbXAQUdSbjvCIJ7qQkGucZKGc1VPC9OpOykfwR1HHO29asA4gg== ARC-Authentication-Results: i=1; mx1.freebsd.org; none Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4jJHD852d5ztDY for ; Mon, 02 Nov 2026 16:27:20 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 47544 by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Mon, 02 Nov 2026 16:27:15 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Cc: Hayzam Sherif From: Mark Johnston Subject: git: ee9205f068c7 - main - vmm: Add a bulk TMR reset hook for Intel APICv List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main X-BeenThere: dev-commits-src-main@freebsd.org Sender: owner-dev-commits-src-main@FreeBSD.org List-Id: Commit messages for the main branch of the src repository List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: markj X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: ee9205f068c7675cf4d23e51cc98238d95ba1950 Auto-Submitted: auto-generated Date: Mon, 02 Nov 2026 16:27:15 +0000 Message-Id: <6ae8b9e3.47544.62baf27c@gitrepo.freebsd.org> The branch main has been updated by markj: URL: https://cgit.FreeBSD.org/src/commit/?id=ee9205f068c7675cf4d23e51cc98238d95ba1950 commit ee9205f068c7675cf4d23e51cc98238d95ba1950 Author: Hayzam Sherif AuthorDate: 2026-11-02 16:21:18 +0000 Commit: Mark Johnston CommitDate: 2026-11-02 16:26:52 +0000 vmm: Add a bulk TMR reset hook for Intel APICv vioapic_update_tmr() resets all 256 vectors before rebuilding the level-triggered vector set. With Intel virtual interrupt delivery, each per-vector reset loads the VMCS, reads and writes an EOI-exit bitmap, and clears the VMCS. Add an optional bulk-reset hook so VMX can clear the four EOI-exit bitmaps with one VMCS load/clear pair. Clear the software TMR banks directly when using the hook, and retain the per-vector fallback for backends without it. Reviewed by: markj MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D60692 --- sys/amd64/vmm/intel/vmx.c | 21 +++++++++++++++++++++ sys/amd64/vmm/io/vlapic.c | 12 +++++++++++- sys/amd64/vmm/io/vlapic_priv.h | 1 + 3 files changed, 33 insertions(+), 1 deletion(-) diff --git a/sys/amd64/vmm/intel/vmx.c b/sys/amd64/vmm/intel/vmx.c index ff0e1cb2b882..0b9a4eea3ebb 100644 --- a/sys/amd64/vmm/intel/vmx.c +++ b/sys/amd64/vmm/intel/vmx.c @@ -3921,6 +3921,26 @@ vmx_set_tmr(struct vlapic *vlapic, int vector, bool level) VMCLEAR(vmcs); } +static void +vmx_reset_tmr(struct vlapic *vlapic) +{ + struct vlapic_vtx *vlapic_vtx; + struct vmcs *vmcs; + + KASSERT(!vcpu_is_running(vlapic->vcpu, NULL), + ("vmx_reset_tmr: vcpu cannot be running")); + + vlapic_vtx = (struct vlapic_vtx *)vlapic; + vmcs = vlapic_vtx->vcpu->vmcs; + + VMPTRLD(vmcs); + vmcs_write(VMCS_EOI_EXIT0, 0); + vmcs_write(VMCS_EOI_EXIT1, 0); + vmcs_write(VMCS_EOI_EXIT2, 0); + vmcs_write(VMCS_EOI_EXIT3, 0); + VMCLEAR(vmcs); +} + static void vmx_enable_x2apic_mode_ts(struct vlapic *vlapic) { @@ -4121,6 +4141,7 @@ vmx_vlapic_init(void *vcpui) vlapic->ops.pending_intr = vmx_pending_intr; vlapic->ops.intr_accepted = vmx_intr_accepted; vlapic->ops.set_tmr = vmx_set_tmr; + vlapic->ops.reset_tmr = vmx_reset_tmr; vlapic->ops.enable_x2apic_mode = vmx_enable_x2apic_mode_vid; } diff --git a/sys/amd64/vmm/io/vlapic.c b/sys/amd64/vmm/io/vlapic.c index e0a1359dffb6..a5009804d72b 100644 --- a/sys/amd64/vmm/io/vlapic.c +++ b/sys/amd64/vmm/io/vlapic.c @@ -1776,10 +1776,20 @@ vlapic_set_tmr(struct vlapic *vlapic, int vector, bool level) void vlapic_reset_tmr(struct vlapic *vlapic) { - int vector; + uint32_t *tmrptr; + int i, vector; VLAPIC_CTR0(vlapic, "vlapic resetting all vectors to edge-triggered"); + if (vlapic->ops.reset_tmr != NULL) { + tmrptr = &vlapic->apic_page->tmr0; + /* APIC register slots are 16 bytes apart. */ + for (i = 0; i < 8; i++) + tmrptr[i * 4] = 0; + (*vlapic->ops.reset_tmr)(vlapic); + return; + } + for (vector = 0; vector <= 255; vector++) vlapic_set_tmr(vlapic, vector, false); } diff --git a/sys/amd64/vmm/io/vlapic_priv.h b/sys/amd64/vmm/io/vlapic_priv.h index 1dce593b9444..f8d23530d277 100644 --- a/sys/amd64/vmm/io/vlapic_priv.h +++ b/sys/amd64/vmm/io/vlapic_priv.h @@ -139,6 +139,7 @@ struct vlapic_ops { void (*intr_accepted)(struct vlapic *vlapic, int vector); void (*post_intr)(struct vlapic *vlapic, int hostcpu); void (*set_tmr)(struct vlapic *vlapic, int vector, bool level); + void (*reset_tmr)(struct vlapic *vlapic); void (*enable_x2apic_mode)(struct vlapic *vlapic); };